sundragon :
1. Obviously 64MB of onboard cache would make it an expensive chip due to size and complexity.
Not if the L4 is on a separate die from the rest of the CPU.
With the 386, 486 and Pentiums, L2 cache used to be on the motherboard. With the Pentium Pro, Pentium 2 and early Pentium 3, the L2 cache used to reside on separate chips on the CPU package.
There is plenty of precedent for on-package/off-die cache.
Also, a 64MB SRAM is more than 3.2 billion transistors which would make this cache larger than the whole CPU die which does not make much sense cost-wise. Logically, this would indicate that the cache is DRAM-based to keep surface area and cost in check. Since DRAM and high-speed CMOS processes do not play well together, this would also point towards an off-die DRAM chip.
So my bet is custom on-package DRAM chip.