[citation][nom]judeh101[/nom]It's not gonna kill me, I pointed out a typo, and that's all. Why make such a friggen big deal out of my message by just typing "TDB"? like seriously. Is it gonna kill you guys by correcting? Cause I'm pretty sure n00bs are going to be like "What the hell is with TDB? I've never seen that before. Could it be TLB (Translation Lookaside Buffer) be 65W? How?" I'm pretty sure that this information is important to information technologists. I won't be comin' back anymore. This website is pointless.[/citation]
So you think nOoBs will not know what TDB means, but will know what TLBs are? Obviously, you do not. Still, I agree, typos should be caught, but, there's a hypocrisy in what you're writing.
TLBs are part of the processor, so I'm pretty sure you're confused.
Think of them as a cache for memory addressing. Since the 8086/88, x86 processors have had a way of virtualizing memory. Consequently, the memory a program asks for, isn't the same as the physical location in any of the virtual modes of the x86 processors. So, there is a translation of virtual to actual physical addresses that must take place for the processor to know what actual physical memory to read based on the virtual address. The processor can actually do this every time it wants to access memory, but it's very slow. So they use TLBs to cache translations that are already done, so they do not calculate it, but rather look it up in this "cache" of address translations.
So you think nOoBs will not know what TDB means, but will know what TLBs are? Obviously, you do not. Still, I agree, typos should be caught, but, there's a hypocrisy in what you're writing.
TLBs are part of the processor, so I'm pretty sure you're confused.
Think of them as a cache for memory addressing. Since the 8086/88, x86 processors have had a way of virtualizing memory. Consequently, the memory a program asks for, isn't the same as the physical location in any of the virtual modes of the x86 processors. So, there is a translation of virtual to actual physical addresses that must take place for the processor to know what actual physical memory to read based on the virtual address. The processor can actually do this every time it wants to access memory, but it's very slow. So they use TLBs to cache translations that are already done, so they do not calculate it, but rather look it up in this "cache" of address translations.