Question Ryzen 3950X Lane Count

braxus

Honorable
Jan 1, 2018
153
3
10,585
I have read about the 3950X possibly only having 20 lanes to use for internal devices. This seems like a big restriction to me, and may end up me not getting this cpu as a result. I use a 1030GT video card, an Optane PCI-E SSD, a NVME SSD, and 3 PCI-E x1 cards (total slots of 5 used on motherboard with everything). I also have like 4 SATA devices in my computer, but not sure that draws on the lane count.

How many lanes do you think I'll need with what I have? Currently with my Intel board running a 7800X, I can't use all the slots on the board due to the CPU lane count on it. My board disabled some of the devices because of this.
 
Oct 24, 2019
37
5
45
I have read about the 3950X possibly only having 20 lanes to use for internal devices. This seems like a big restriction to me, and may end up me not getting this cpu as a result. I use a 1030GT video card, an Optane PCI-E SSD, a NVME SSD, and 3 PCI-E x1 cards (total slots of 5 used on motherboard with everything). I also have like 4 SATA devices in my computer, but not sure that draws on the lane count.

How many lanes do you think I'll need with what I have? Currently with my Intel board running a 7800X, I can't use all the slots on the board due to the CPU lane count on it. My board disabled some of the devices because of this.
If you use x570 with 3950x you will be able to use pci express gen 4 that has much faster transfer rates. I would really recommend you have a look at LTT 3950x review he has explained how you can make the best out of those 20 lanes

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InvalidError

Titan
Moderator
The 3950 works the same way as all other AM4 CPUs: 20 PCIE lanes for 16+4/8+8+4/8+4+4+4, 4 PCIe lanes for the chipset link, then whatever extra lanes the chipset provides. The x570 chipset has u0 to 16 HSIO lanes that can motherboard manufacturers could use for extra PCIe, for a CPU+chipset combined maximum usable total of 36. Actual usable will vary depending on the amount of extra on-board stuff eating chipset lanes and how many HSIO lanes the board manufacturer decides to allocate to SATA or USB.