Wasn't PS3 the last to use Cell? And if so, isn't that somewhat structured around IBM's PowerPC ISA?
I think it was the only really successful use of the Cell. I know the Cell got limited use in some HPC contexts, but I'd be surprised if the revenue from those efforts ever amounted to much.
Its rather interesting if that is the case that there is a potentially lowered emulation hit going from one type of RISC to another type of RISC.(or if its just that ARM and PPC have a lot of similarities)
Yeah, I had similar thoughts. Maybe there's less impedance mismatch, between those ISAs. Perhaps a lot depends on how well ARM Neon matches the Cell's vector extensions. The main horsepower of the Cell really lies in the SPEs and their vector pipelines, so how well you can emulate those seems key.
Since the SPEs each have 256 kB of SRAM, another big factor is probably having plenty of fast L2 cache, so the SPE data stays "hot".
According to what I can find, the Pi 5 has:
- 64KByte I and D caches
- 512KB L2 per core
- 2MB shared L3
So, perhaps its cache configuration meets the bare minimum? Depends somewhat on whether the GPU also shares the L3, I think.
Also, sticking with the theme of SPEs, because the PS3 had 6 of them (enabled and available to games, at least), it is a little surprising a mere 4-core Pi 5 would be competent at emulation. I'd expect RPCS3 to strongly favor 8-core CPUs, since that gives you full concurrency of the 6 SPEs + PPE, with a core to spare for OS stuff.