News TeamGroup Enters DDR5 Validation Phase With Motherboard Makers

I hope that the higher speed of DD5 pushes all CPUs toward elimination of L3 cache (especially at <=5nm), with much larger low-latency L2 cache taking its place.

If you think supply issues are bad now, the same (or worse) will likely be true 9 to 12 months from now as the apparent benefits of this (finally new again) break-neck technological race play out.
 
They've been promising ram that will configure itself properly for the last 30 years. First it was SPD, then XMP and now this. It's nice having the options to overclock etc but it'd be nice to put together a machine and have it "just work" (lookin at you AMD).