Question Technical question regarding functionality of CPU

jinkazuya

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Feb 23, 2010
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Well, reading a book does not always clarify concepts and sometimes it might be confusing when the author deep dives into the technical concepts. I hope some of the knowledgeable techs or gurus could shed some lights on the concepts and the questions I ask.

  1. Where is the multiplier located? Is it located inside the CPU or the CPU package? Or is it on the motherboard? But if it is inside the CPU, how come people always say things such as changing the multiplier of the motherboard? This is the first confusing concept.
  2. Baseclock. Is baseclock (BCLK) only related to the CPU or the whole system? How come people say well if you wanna overclock, you could do so with the baseclock?
  3. According to the book, the author states (Michael Meyer) that, when he talks about RAM, "When the CPU needs certain bytes of data, it requests those bytes via the address bus. The CPU does not know the physical location of the RAM that stores that data, not the physical makeup of the RAM - such as how many DRAM chips work together to provide the 64-bit wide memory rows. The Memory controller chip keeps track of this and just gives the CPU whichever bytes it requests." The question is if the CPU does not know the address, how can it request the data? Likewise, how can it also send data to the memory?
 
Where is the multiplier located? Is it located inside the CPU or the CPU package? Or is it on the motherboard? But if it is inside the CPU, how come people always say things such as changing the multiplier of the motherboard? This is the first confusing concept.
multipler is located inside cpu, can be controlled by mainboard bios and on some locked CPU by covering or shorting CPU pins

Baseclock. Is baseclock (BCLK) only related to the CPU or the whole system? How come people say well if you wanna overclock, you could do so with the baseclock?
it its whole system wide 100MHz bus, other devices connected to it have its own multipliers to operate on their own frequencies, but its ultimately tied to FSB clock as a base, some premium priced mainboards offer external clock generator to keep system wide clock separate from FSB, so other non CPU devices keeps 100MHz, while CPU can go higher..but with CPU pcie lanes this technique became a bit obsolete due to M2 nvme not liking high ovecrlocked CPU FSB at all, GPUs on other hand do like FSB overclock

According to the book, the author states (Michael Meyer) that, when he talks about RAM, "When the CPU needs certain bytes of data, it requests those bytes via the address bus. The CPU does not know the physical location of the RAM that stores that data, not the physical makeup of the RAM - such as how many DRAM chips work together to provide the 64-bit wide memory rows. The Memory controller chip keeps track of this and just gives the CPU whichever bytes it requests." The question is if the CPU does not know the address, how can it request the data? Likewise, how can it also send data to the memory?

The CPU does not need to know the physical location of the RAM or the physical makeup of the RAM in order to request data. Instead, the CPU uses virtual addressing, which allows it to address memory using virtual addresses that are mapped to physical addresses by the memory management unit (MMU) in the CPU. The MMU translates the virtual addresses used by the CPU into physical addresses that correspond to the location of the data in physical memory.
When the CPU needs to access a specific piece of data, it sends the virtual address of that data to the memory controller via the address bus. The memory controller then uses the MMU to translate the virtual address into a physical address, and then uses that physical address to access the data in RAM. The requested data is then sent back to the CPU via the data bus.
Similarly, when the CPU wants to write data to memory, it sends the virtual address of the location where the data should be stored, along with the data itself, to the memory controller via the address and data buses. The memory controller then uses the MMU to translate the virtual address into a physical address and writes the data to the corresponding location in RAM.
 

Karadjgne

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BCLK is buss clock, not base. The base clock is the default speed of the cpu, without external bios settings like turbo or boost. A cpu will typically have 3 set speeds, turbo, base and idle.

Cpu clock speeds are set by BCLK x multiplier. Because the BCLK is tied to the FSB, that can have a system wide affect, it'll affect transmission speeds between components like the cpu an ram, or ram and storage, but it also affects the super i/o and USB, pcie and Sata links. So it's best left alone at 100.00 for the sake of stability, but can generally handle a very small change, upto @ 103.70 IF there's sufficient cooling available for all the parts involved.

For many years, the Performance Enhancing vendor software OC was nothing more than a BCLK manipulation, whereas a standard OC involved a multiplier manipulation in bios, a somewhat more stable approach as the multiplier only affects the cpu, not anything else.

Because ultra high multiplier settings require ultra high amounts of voltage to sustain the frequency, most world cpu speed records, especially using LN2 etc, are a combination of BCLK and multiplier OC, where the multiplier is set lower than it could be but the BCLK is bumped up, so instead of a 55 x 100MHz, you'd use a 52 x 106MHz to get 5.5GHz. Which reduces needed voltages.

But that's not exactly healthy or wise for everyday use.
 
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Where is the multiplier located? Is it located inside the CPU or the CPU package? Or is it on the motherboard? But if it is inside the CPU, how come people always say things such as changing the multiplier of the motherboard? This is the first confusing concept.
It's inside the CPU itself. CPUs may have something called a Phase Locked Loop, or PLL. This device can take a reference clock signal (the base clock) and multiplies it. It's an old slide, but this one shows a block diagram of the power and frequency control part of a CPU (from https://www.anandtech.com/show/2594/12):

PCU.jpg


You can see an example of a basic one at http://www.falstad.com/circuit/ (select Circuits -> Phase-Locked Loops -> Frequency Doubler). And also you can read more on Wikipedia if you're interested.
Baseclock. Is baseclock (BCLK) only related to the CPU or the whole system? How come people say well if you wanna overclock, you could do so with the baseclock?
Base clock affects the whole system. It's cheaper and easier to design a system around a single clock source. All the other hardware can multiply or divide the clock signal as needed to operate at whatever speed suits it. Since base clock still feeds the CPU, you can adjust it to overclock the CPU that won't let you change the multiplier setting. But since this affects all of the system, you can't get very far because all the other parts were only designed around a certain frequency.

According to the book, the author states (Michael Meyer) that, when he talks about RAM, "When the CPU needs certain bytes of data, it requests those bytes via the address bus. The CPU does not know the physical location of the RAM that stores that data, not the physical makeup of the RAM - such as how many DRAM chips work together to provide the 64-bit wide memory rows. The Memory controller chip keeps track of this and just gives the CPU whichever bytes it requests." The question is if the CPU does not know the address, how can it request the data? Likewise, how can it also send data to the memory?
When the CPU wants to read data from a memory location, it puts it out via the address pins. So say there are 8 address pins which lets us address 256 bytes. So if it wants to access address 17, which is binary 0b00010001, it only sets two specific address pins. Traditionally, these pins were hooked up to a RAM chip, the RAM chip sees which pins have which value, and converts this back to some address it understands. In a simple case like this, it'll also see two pins set to the value one and translates that as address 17 in return.

4GVTojF.png


So here's a basic illustration, where the lines are the wires that connect the address pins. You can also use these wires to transmit data, but for the sake of simplicity, let's say the data lines are hooked up somewhere else.

Let's say we want the next generation of CPU to be able to address more RAM. But we're being simple, so we only add two more address pins. This brings the total amount of memory addressable to 1024 bytes. Except there's one problem, we don't have RAM chips that can store 1024 bytes yet! But we can add 3 more RAM chips. As each of them holds 256 bytes, we now have our 1024 bytes we can address.

But you may notice, we only have two extra pins, how can we address four chips? Using something called a multiplexer which takes a binary-based input and sends a 1 over the wire corresponding to the value. In this case, we can use a 2-bit multiplexer, which gives us four possible outputs. We can then connect these outputs to the RAM chips, which tells the RAM chip that the CPU is going to send an address to it.

bGYu3TI.png


In this picture, the orange line is the original 8 address pins, but the green lines are the new address pins and how they wire up to the RAM chips.

However, here's a snag: from the computer's point of view, RAM is just a single block of 1024 bytes, not 4 sets of 256 bytes. When the CPU accesses data from RAM chip 1, the first 256 bytes, the address from both the CPU and RAM's point of view maps 1:1. Address 123 from the CPU is address 123 from RAM chip 1's point of view. However when you address from byte 256 and beyond, things get weird. When the CPU wants data from address 300, this selects RAM chip 2. But from RAM chip 2's point of view, this is address 43, because while RAM chip 2 handles addresses 256-511, it itself has addresses 0-255.

Oh and addresses start from value 0. That's a valid value.

Modern systems are more complicated than this, but the idea is more or less the same.
 
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jinkazuya

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Feb 23, 2010
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kerberos_20,
Karadjgne,
hotaru.hino


Thank you, thank you, thank you, thank you and thank you. Greatly appreciate for the detail explanation.

BCLK is buss clock, not base. The base clock is the default speed of the cpu, without external bios settings like turbo or boost. A cpu will typically have 3 set speeds, turbo, base and idle.

Anyway, is the BCLK the bus clock? Cuz lots of people said BCLK is the base clock, which is a bit confusing for terms like these.
 
Anyway, is the BCLK the bus clock? Cuz lots of people said BCLK is the base clock, which is a bit confusing for terms like these.
B - base
CLK- clock
BCLK = base clock

its base clock for pretty much for anything in pc which is connected with cpu
to avoid timing issues if there would be more than one clock, there is just one reference clock unless you get mainboard with external clock generator to separate crystal clock (cpu) from hcsl clock (pcie)
 

Karadjgne

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Buss/base clock same thing, if referring to the communication speeds on the buss. What gets confusing is when mixing terminology referring to the base speed of the cpu, it's default non-turbo, and ppl use base clock, idle clock turbo clocks etc.

The base clock of the buss system isn't the same thing as the base clock of the cpu speeds.