The new Tullie, L2 & L1

lhgpoobaa

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Dec 31, 2007
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Theres been a fair amout of discussion recently about the new Tullie and its nice L2 cache of 512Kb.

My concern is however the L1 cache which arguably is more important.

I know my athie has 128k L1 & 256K L2.
who knows the L1 & L2 capacities of all the current x86 processors?
e.g.
cellery, pee3, pee4, tully, durie, athie & athie4.?

*smiles*
i think tonite i will disable my cache! First just the L2, then the L1 then Both Caches and have a look at the performance.
would someone please try the same for a P4 or P3?
curious to see how they behave...

a scientist at heart... covered with the fur of a hamster.




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rbertino

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Jan 16, 2001
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I'll save you the suspense. I did it once with my Duron processor. With the L2 cache disabled it runs REALLY SLOW (about like a 486). With the L1 cache disabled, you could leave it running all day, and it still wouldn't have booted into Windows...

<i>I don't know anything about computers... but I did stay at a Holiday Inn last night...</i> :lol:
 

FatBurger

Illustrious
P3's have 32k of L1 cache, compared to an Athlon's 128k of L1.
P4's actually don't have L1, per se, they have something called "trace cache" or maybe "trace route cache", that is supposed to be better than the typical 32k of cache, or even the 128k of cache. But Intel isn't always right in saying that their products are the best thing since, and including sliced bread.

------------------------------
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MeTaLrOcKeR

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May 2, 2001
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Here

Cellery = 16K-D & 16K-I L1 Cache (32K Total)
128K of Full-speed, On-die L2 cache

pee3 = 16K-D & 16K-I L1 Cache (32K Total)
256K of Full-speed, On-die L2 cache

pee4 = No L1 cache....has 'Trace Route Cache' which is aparently not necessarilly better, but its smaller on the die and more efficient than having a Larger L1 cache.
256K of Full-speed On-die L2 cache

tully = 16K-D & 16K-I L1 cache (32K Total)
256K & 512K Versions of Full-speed, On-die L2 caches

durie = 64K-D & 64K-I L1 cache (128K total)
64K of Full-speed, On-die L2 cache (16 Way-Set Associative)

athie = 64K-D & 64K-I L1 cache (128K Total)
256K of Full-speed, On-die L2 cache (I believe also 16 Way-Set Associative)

athie4 = 64K-D & 64K-I L1 Cache (128K Total)
256K of Full-speed, On-die L2 cache (I believe also 16 Way-Set Associative)

and thats all from the top of my head.....
BTW The '-I' stands for Instruction cache and the '-D' stands for Data cache.

-MeTaL RoCkEr

AMD = Always Making Dough... =)
 

khha4113

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Dec 31, 2007
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pee3 = 16K-D & 16K-I L1 Cache (32K Total)
256K of Full-speed, On-die L2 cache
I'd just like to add that it is for <b>Coppermine</b> core. The old P3 (Katmai core) has 512K L2 Off-Die run at half of speed of CPU's.

:smile: Good or Bad have no meaning at all, depends on what your point of view is.
 
G

Guest

Guest
The L1 cache is only important in relation to the branch prediction unit.

If the prediction is good, the L1 cache isn't as necessary (i.e. Pentium III). If the prediction is ho-hum, L1 cache becomes essential (i.e. Athlon). If prediction downright sucks, even 20MB L1 won't help.

If I remember rightly, P3 has a roughly 2% error rate in prediction, and it thus needs relatively little L1. Athlon, on the other hand, suffers from a 10% misprediction rate, thus needing much more than P3.

I could be wrong, but oh well, that's how I understand it.

If you look hard enough, you might see it...

Well, I did say you <b>might</b> see it...