Toshiba Sampling 64GB UFS-Based NAND chips

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UFS, or in laymans terms USB gone SCSI, is a very interesting technology for mobile devices that could over time make actual separate volatile memory redundant as the transfer rates using only a single lane offer half the transfer rate as current LPDDR2 memory. One could easily imagine that with several lanes to each module and more modules in parallel could replace the need for DRAM in mobile devices altogether.
 
[citation][nom]saturnus[/nom]UFS, or in laymans terms USB gone SCSI, is a very interesting technology for mobile devices that could over time make actual separate volatile memory redundant as the transfer rates using only a single lane offer half the transfer rate as current LPDDR2 memory. One could easily imagine that with several lanes to each module and more modules in parallel could replace the need for DRAM in mobile devices altogether.[/citation]
Give it 5 years and Intel will integrate this into their CPUs... :lol:

But actually...if what you're saying is correct...it would be kind of cool, to have one of these as an expansion card to your mobile devices. Increase RAM and storage simultaneously.
 
The article discusses "64 GB embedded NAND flash memory modules" but doesn't explain what the previous specs were so, how are us noobs suppose to know what the upgrade really is when the article doesn't give us the last model specs to compare it to?
 
@saturnus: Sorry to disagree with you about UFS eventually making the need for separate volatile RAM redundant; it will not. UFS is an evolved interface spec for flash memory and does nothing to eliminate the inherent limitations in the flash memory itself. The number of memory operations that occur with code execution would create inherent instabilities in the current flash technologies that we don't know how to overcome --- yet. Running flash modules in parallel, as you suggest, would greatly exacerbate the already known problems with flash technologies; there's are really good reasons why disk/flash access moved from parallel to serial access such as clocking, capacitance, etc.

http://en.wikipedia.org/wiki/Flash_memory#Limitations
 
@saturnus: Sorry to disagree with you about UFS eventually making the need for separate volatile RAM redundant; it will not. UFS is an evolved interface spec for flash memory and does nothing to eliminate the inherent limitations in the flash memory itself. The number of memory operations that occur with code execution would create inherent instabilities in the current flash technologies that we don't know how to overcome --- yet. Running flash modules in parallel, as you suggest, would greatly exacerbate the already known problems with flash technologies; there's are really good reasons why disk/flash access moved from parallel to serial access such as clocking, capacitance, etc.

http://en.wikipedia.org/wiki/Flash_memory#Limitations
 
@saturnus: Sorry to disagree with you about UFS eventually making the need for separate volatile RAM redundant; it will not. UFS is an evolved interface spec for flash memory and does nothing to eliminate the inherent limitations in the flash memory itself. The number of memory operations that occur with code execution would create inherent instabilities in the current flash technologies that we don't know how to overcome --- yet. Running flash modules in parallel, as you suggest, would greatly exacerbate the already known problems with flash technologies; there's are really good reasons why disk/flash access moved from parallel to serial access such as clocking, capacitance, etc.

http://en.wikipedia.org/wiki/Flash_memory#Limitations
 
Why is it so difficult to detect and eliminate duplicate comment submissions?

Why is it so difficult to detect and eliminate duplicate comment submissions?

Why is it so difficult to detect and eliminate duplicate comment submissions?
 
[citation][nom]richwaa[/nom]@saturnus: Sorry to disagree with you about UFS eventually making the need for separate volatile RAM redundant; it will not. UFS is an evolved interface spec for flash memory and does nothing to eliminate the inherent limitations in the flash memory itself. The number of memory operations that occur with code execution would create inherent instabilities in the current flash technologies that we don't know how to overcome --- yet. Running flash modules in parallel, as you suggest, would greatly exacerbate the already known problems with flash technologies; there's are really good reasons why disk/flash access moved from parallel to serial access such as clocking, capacitance, etc.http://en.wikipedia.org/wiki/Flash_memory#Limitations[/citation]

Well, they could do something more like PCIe with multiple serial lanes, granted I still wouldn't want flash memory to replace DRAM. Flash's increasingly poor endurance with every process shrink and bits per cell increase would probably only help planned obsolescence supporters.

[citation][nom]saturnus[/nom]UFS, or in laymans terms USB gone SCSI, is a very interesting technology for mobile devices that could over time make actual separate volatile memory redundant as the transfer rates using only a single lane offer half the transfer rate as current LPDDR2 memory. One could easily imagine that with several lanes to each module and more modules in parallel could replace the need for DRAM in mobile devices altogether.[/citation]

Many SoCs have memory bandwidth in several GB/s. Going down to a few Gb/s is a huge downgrade in performance. No, these memory chips are not half the transfer rate of current LPDDR2 memory. As is, memory bandwidth of mobile devices is often one of the greatest bottle-necks for performance, so such a step back or even going with what I said above to maybe get similar performance is not the trend that is needed right now.
 
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