Toshiba Shows 64-Layer BiCS FLASH At Dell World

[Guest]

The last of the 3D holdouts is ready to cross over. Projections show that over 50% of all flash shipped in 2017 will be 3D, but that's a conservative estimate for aftermarket SSDs. The new parts may help with the flash shortage.

Toshiba Shows 64-Layer BiCS FLASH At Dell World : Read more

 

[drwho1]

Using third-generation BiCS means SSD manufacturers can build consumer and enterprise SSDs with up to 1TB of capacity for each package. On the consumer side, we often see products with eight and even 16 packages on the circuit board. Once available, and after the early yield issues are resolved, we should get out of the NAND shortage with higher-capacity and cheaper products.

If I read this correctly, this means a 16TB SSD is possible.

 

[chaz_music]

"Last year, we spoke with SanDisk and learned that the company saw MLC as the past and TLC as the future."

Great article, Chris. Just one note. TLC implies three logic levels per cell, and MLC is undefined as Multiple Level Cell. The industry has to go forward with higher and higher bit levels to get cost down. The 3D approach is a packing evolution but it still requires the same basic manufacturing and die growth to make. That means the cost is still about the same per GB to manufacture = same cost to consumer per GB.

Sandisk has an X4 line that is 4 bits per cell. So their quote is probably a miscommunication on their part. But - it is exciting to see these technologies developing.

- Charles

 

[Rookie_MIB]

Using third-generation BiCS means SSD manufacturers can build consumer and enterprise SSDs with up to 1TB of capacity for each package. On the consumer side, we often see products with eight and even 16 packages on the circuit board. Once available, and after the early yield issues are resolved, we should get out of the NAND shortage with higher-capacity and cheaper products.

If I read this correctly, this means a 16TB SSD is possible.

Possible? Certainly. Affordable? That's the debatable part.

Overall the thing I do see with the transitioning to stacked cells is that the TLC endurance can be extended quite a bit as the larger lithography is more forgiving and allows for a higher program/erase count. What is still very much open to debate though is still -speed-. So many of the lower priced TLC drives really perform quite poorly compared to the MLC drives (with a few notable exceptions) and from what I see it's not an issue with controller hardware - but more of an issue with the nature of trying to accurately program a TLC data cell with a very exact voltage to represent the bit-state.

 

[TomHaX]

Samsung V-NAND (3D NAND) is the gold standard and much better than SLC/TLC/MLC-NAND.