News Toshiba Talks 5-Bit-per-Cell Flash, Demo's First PCIe 4.0 Enterprise SSDs

[Admin]

Toshiba is working on Penta-Level Cell (PLC) flash that stores five bits per cell.

Toshiba Talks 5-Bit-per-Cell Flash, Demo's First PCIe 4.0 Enterprise SSDs : Read more

 

[razor512]

Awesome, a SSD that will fail before you can finish installing the Linux kernel.

 

[hannibal]

Better that way! You don't Waste time installing programs because the drive fails before you get that far
But yeah... don't use this for anything you have to save longer time. Maybe a space for windows temporary files and browser cookies...

 

[Giroro]

Awesome, a SSD that will fail before you can finish installing the Linux kernel.

Don't worry, they're going to mitigate the problem by installing your OS into your RAM.

Because the point of nonvolatile storage is to keep as much as possible in your volatile memory, right? It made me wonder how long until motherboards start shipping with backup batteries, just to keep cheap storage functional... Then I remembered that ultra-cheap unreliable SSDs are mostly being used to occupy the only m.2 slot in OEM laptops with <1yr warranties.

 

[bit_user]

Penta-level cell (PLC)

It's really incorrect to call it penta-level cells, since 5-level cells do not store 5 bits of information! The actual amount you can pack into them would be log2( 5 ) which is about 2.322 bits per cell. In practice, it would be a little lower than that, because the packing is done on a block-level, and then you need to spend some bits on ECC.

There's a slide that makes it clear they're actually talking about 32-level cells, which are truly 5-bit (before accounting for ECC overhead, etc).

The abbreviation should be PBC (Penta-Bit Cell).

Anyway, I'm hoping to buy something like their XL-Flash in a M.2 or PCIe card.

 

[TJ Hooker]

It's really incorrect to call it penta-level cells, since 5-level cells do not store 5 bits of information!
[...]
The abbreviation should be PBC (Penta-Bit Cell).

I agree, but to be fair at this point they're essentially just following the (bad) convention started with TLC (and then QLC). Which in turn were probably trying to stick to the format of [X]LC as started by MLC, which was a more or less appropriate acronym (or at least was until it started being used to refer specifically to 2 bit-per-cell NAND). What a mess lol.

 

[bit_user]

I agree, but to be fair at this point they're essentially just following the (bad) convention started with TLC (and then QLC). Which in turn were probably trying to stick to the format of [X]LC as started by MLC, which was a more or less appropriate acronym (or at least was until it started being used to refer specifically to 2 bit-per-cell NAND). What a mess lol.

Eh, they don't necessarily need to adopt PLC,at this time, even though Toshiba used it in a slide.