[SOLVED] transfer rate ram

thebeeee

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hello, I have a doubt but it can be a little confusing, I will try to explain, for example a memory with 3200mhz ddr4 memory, will it transfer 64 bits to the processor 3200 times per second?
 
Solution
No. 3200mhz stands roughly for 3,200,000,000 times per second. But that is not all used transferring data to/from the processor. The memory controller sends messages to/from the DRAM modules, some waiting occurs while things are processed, and the DRAM modules return data to/from the memory controller. What the actual throughput to/from the CPU is will depend on all of the other DRAM related timings.

Each channel represents 64 bits. So the amount of data actually processed depends on how many channels the machine is running. Two channels handle 128 bits at a time while three channels handle 192 bits, quad channel handles 256 bits, etc.
No. 3200mhz stands roughly for 3,200,000,000 times per second. But that is not all used transferring data to/from the processor. The memory controller sends messages to/from the DRAM modules, some waiting occurs while things are processed, and the DRAM modules return data to/from the memory controller. What the actual throughput to/from the CPU is will depend on all of the other DRAM related timings.

Each channel represents 64 bits. So the amount of data actually processed depends on how many channels the machine is running. Two channels handle 128 bits at a time while three channels handle 192 bits, quad channel handles 256 bits, etc.
 
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Solution

thebeeee

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No. 3200mhz stands roughly for 3,200,000,000 times per second. But that is not all used transferring data to/from the processor. The memory controller sends messages to/from the DRAM modules, some waiting occurs while things are processed, and the DRAM modules return data to/from the memory controller. What the actual throughput to/from the CPU is will depend on all of the other DRAM related timings.

Each channel represents 64 bits. So the amount of data actually processed depends on how many channels the machine is running. Two channels handle 128 bits at a time while three channels handle 192 bits, quad channel handles 256 bits, etc.
ok, but let's say that the memory is in a single chanel and has 3200mhz, so it transfers 64bits to the processor by its clock pulse which is 3200mhz right?
 

Zerk2012

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ok, but let's say that the memory is in a single chanel and has 3200mhz, so it transfers 64bits to the processor by its clock pulse which is 3200mhz right?
You should be thinking in bandwidth not clock speed.
Friendly nameIndustry namePeak Transfer RateData transfers/second (in millions)
DDR4-2400PC4-1920019200 MB/s2400
DDR4-2666PC4-2130021300 MB/s2666
DDR4-2933PC4-2340023400 MB/s2933
DDR4-3000PC4-2400024000 MB/s3000
DDR4-3200PC4-2560025600 MB/s3200
 

thebeeee

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yes, more or less i would like to understand if the memory sends 64 bits to cpu each clock pulse, as in this case it transfers 64 bits to the processor by its clock pulse which is 3200mhz
 
The theoretical answer is yes, in this case 3.2 billion cycles per second.

The actual answer is a little more complex, for example there are RAM timings such as CAS [column address strobe], a number that represents latency. So, the higher mhz means faster while higher latency means slower, CAS 18 is slower than CAS 14. And, 64 bit is the width of the data path. AMD CPUs use 64 bit and Intel CPUs use a 64 bit bus licensed from AMD. The subject can get very complex, so, to keep it simple the answer to your question is yes.
 
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yes, more or less i would like to understand if the memory sends 64 bits to cpu each clock pulse, as in this case it transfers 64 bits to the processor by its clock pulse which is 3200mhz
The 3200MHz is the module speed. That is different than the clock pulse speed. Since it is DDR (Double Data Rate) memory the data is transferred on both the rising and falling edge of the clock signal which is actually 1600MHz, e.g. 2 transfers at 1600MHz clock is 3200MHz memory module rate.

Time--->
Clock Signal
__ __
| |__ | |
^ ^
| |
..............Clock frequency is measured peak to peak

Clock Signal
__ __
| |__| | (SDR)
^
| Single Data Rate
| Data is tranferred on the rising edge
...........Rising edge

Clock Signal
__ __
| |__| | (DDR)
^^
| |
| ........Falling edge
| Double Data Rate
| Data is transferred on both edges
...........Rising edge