News TSMC and Partners Develop Key Feature for Sub 1nm Process Technology

techrabbit2015

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Nov 19, 2018
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For all of you excited about how many atoms wide these are, this isn't how these companies are designating "1nm" or even "5nm" at this stage. It is no longer calculated like that. The transistors are actually much bigger.
 

InvalidError

Titan
Moderator
For all of you excited about how many atoms wide these are, this isn't how these companies are designating "1nm" or even "5nm" at this stage. It is no longer calculated like that. The transistors are actually much bigger.
Nobody wrote anything about transistors.

The "size" of processes has been about an unspecified feature's size which varies between manufacturers that isn't necessarily the smallest part of the design for a long time and a "feature" is something like minimum trace-to-trace pitch, FET channel width, gate insulation thickness, etc., not entire transistors.

Doesn't change the fact that at 1nm, most dimensions can indeed be described by single-digit atom count. We're almost at the point where atomic decay of the materials CPUs are made from could become enough to cause issues: can't afford too many of a 1nmsq channel's ~25 atoms cross-section changing into anything else.
 
For all of you excited about how many atoms wide these are, this isn't how these companies are designating "1nm" or even "5nm" at this stage. It is no longer calculated like that. The transistors are actually much bigger.
The nm refers to the size of certain structures used to make transistors. Unfortunately each company uses a different structure as a reference, so you can't compare the nm number between companies.
  • TSMC 12nm is about 29 million transistors / mm^2
  • Intel 14 nm is about 35 MT / mm^2
  • TSMC 10nm is about 52 MT / mm^2
  • Intel 10nm is about equal to TSMC 7nm (both around 100-110 MT / mm^2).
  • TSMC 5nm is about 173 MT/mm^2.
  • Intel 7nm (if it ever gets here) is estimated to be at about 225-250 MT / mm^2,
  • TSMC 3nm is supposed to be 70% higher than their 5nm, which would be about 290 MT/mm^2.
From what I gather, a silicon atom is about 0.132 nm across. So 1 mm^2 = 7.5 million x 7.5 million silicon atoms. Or about 325,000 atoms (surface area) per transistor. Or 570x570 atoms per transistor if they were square (less probably after accounting for dead space between transistors).

If you compare transistor density to process, the relationship is close to (but slightly less than) the square. So if you figure a 1 nm process results in about 25% the linear density of their 5 nm process, then you get transistors about 140 x 140 atoms across.
 
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escksu

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Aug 8, 2019
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Nobody wrote anything about transistors.

The "size" of processes has been about an unspecified feature's size which varies between manufacturers that isn't necessarily the smallest part of the design for a long time and a "feature" is something like minimum trace-to-trace pitch, FET channel width, gate insulation thickness, etc., not entire transistors.

Doesn't change the fact that at 1nm, most dimensions can indeed be described by single-digit atom count. We're almost at the point where atomic decay of the materials CPUs are made from could become enough to cause issues: can't afford too many of a 1nmsq channel's ~25 atoms cross-section changing into anything else.
From what i see, its probably going to be gaafet cross section.
 

InvalidError

Titan
Moderator
From what i see, its probably going to be gaafet cross section.
That wouldn't be much of a metric on its own since the width of FET channels depends on the total current the FET needs to pass which can itself be divided between multiple vertically and horizontally stacked parallel channels sharing an all-around gate.
 

gg83

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Jul 10, 2015
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The nm refers to the size of certain structures used to make transistors. Unfortunately each company uses a different structure as a reference, so you can't compare the nm number between companies.
  • TSMC 12nm is about 29 million transistors / mm^2
  • Intel 14 nm is about 35 MT / mm^2
  • TSMC 10nm is about 52 MT / mm^2
  • Intel 10nm is about equal to TSMC 7nm (both around 100-110 MT / mm^2).
  • TSMC 5nm is about 173 MT/mm^2.
  • Intel 7nm (if it ever gets here) is estimated to be at about 225-250 MT / mm^2,
  • TSMC 3nm is supposed to be 70% higher than their 5nm, which would be about 290 MT/mm^2.
From what I gather, a silicon atom is about 0.132 nm across. So 1 mm^2 = 7.5 million x 7.5 million silicon atoms. Or about 325,000 atoms (surface area) per transistor. Or 570x570 atoms per transistor if they were square (less probably after accounting for dead space between transistors).

If you compare transistor density to process, the relationship is close to (but slightly less than) the square. So if you figure a 1 nm process results in about 25% the linear density of their 5 nm process, then you get transistors about 140 x 140 atoms across.
Awesome!
 
May 21, 2021
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I remember reading years ago that it would be impossible to go below 3nm as electricity currents start to interfere with each other.

Was this solved just by changing the alloys? Or was it actually only a theoretical issue and not a real world problem.
 

Drazen

Honorable
Dec 29, 2015
26
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10,535
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The nm refers to the size of certain structures used to make transistors. Unfortunately each company uses a different structure as a reference, so you can't compare the nm number between companies.
  • TSMC 12nm is about 29 million transistors / mm^2
  • Intel 14 nm is about 35 MT / mm^2
  • TSMC 10nm is about 52 MT / mm^2
  • Intel 10nm is about equal to TSMC 7nm (both around 100-110 MT / mm^2).
  • TSMC 5nm is about 173 MT/mm^2.
  • Intel 7nm (if it ever gets here) is estimated to be at about 225-250 MT / mm^2,
  • TSMC 3nm is supposed to be 70% higher than their 5nm, which would be about 290 MT/mm^2.
From what I gather, a silicon atom is about 0.132 nm across. So 1 mm^2 = 7.5 million x 7.5 million silicon atoms. Or about 325,000 atoms (surface area) per transistor. Or 570x570 atoms per transistor if they were square (less probably after accounting for dead space between transistors).

If you compare transistor density to process, the relationship is close to (but slightly less than) the square. So if you figure a 1 nm process results in about 25% the linear density of their 5 nm process, then you get transistors about 140 x 140 atoms across.
nm scale is marketing BS, very big BS which started somewhere around 40 - 30nm. Think was started by TSMC and Intel followed.
Even transistor density is not valid measure but is way more accurate then nm. Reason are different transistor types, single gate, dual gate, etc.

Data on transistor size was specified for IBM 2nm node, 45 x 75 nm! That's way, way larger then 2nm!!!
IBM 2nm fins are 12nm in width and thinnest is insulation of 5nm. And FinFET transistors have multiple fins, even spare fins for insulation. Btw IBM 2nm is GAA cause FinFET have too high leakage.
 
May 23, 2021
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To the author: please credit this work correctly. The paper (in Nature) clearly lists the first four authors as having "contributed equally", and two of the first four authors are affiliated with UC Berkeley. I presume you just copied Verdict's incorrect reporting, and I've complained to them too. I'm sorry that I couldn't find a way to make this complaint privately.
 

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