News TSMC could charge up to $45,000 for 1.6nm wafers — rumors allege a 50% increase in pricing over prior-gen wafers

With an advertised density increase between 1.07x and 1.1x (may or may not be achievable in practice) and a price increase of 1.5x, cost/transistor climbs by 1.36x - 1.4x. Or in other words, 'just' a die shrink of an existing chip design becomes more expensive on a newer node.
 
With an advertised density increase between 1.07x and 1.1x (may or may not be achievable in practice) and a price increase of 1.5x, cost/transistor climbs by 1.36x - 1.4x. Or in other words, 'just' a die shrink of an existing chip design becomes more expensive on a newer node.
It has been like that for at least 10 years. Back in 2015, 28 nm transistors where cheaper than 20 nm and 16 nm. Which means that Moore law has been dead for a decade. If anyone has read the original Gordon Moore paper, its not about transistors per chip but about cost per transistor.
 
Rumors suggest they are relying on multipatterning EUV rather than moving to high-NA. Their approach requires more steps, more time, and therefore more money vs N3.
 
I knew the backside power delivery would add cost, but I was not expecting this cost delta. That cost should go down over time as their process improves and yield goes up. But the yields on the first batches are going to be rather poor. In other words = $$$$$.

The real cost jump (and massive performance jump) will occur when they transition to SiC (silicon carbide). It has a MUCH better thermal conductivity than standard old silicon, and a faster switching speed. It can also be made to create LEDs directly, unlike Si. So things like Oculink and other optical based comms can be made on die. I envision the PCIe bus to transition to optical this way (maybe). All of this will certainly come to servers first.

But there are also RF type transistors such as GAN or GaAs (less thermal conductivity). Good options ...
 
It has been like that for at least 10 years. Back in 2015, 28 nm transistors where cheaper than 20 nm and 16 nm. Which means that Moore law has been dead for a decade. If anyone has read the original Gordon Moore paper, its not about transistors per chip but about cost per transistor.
Close: ~22mn was the inflection where cost-per-die-area started increasing per process stepping, but cost-per-transistor plateaued a few processes later (though has indeed been increasing for several years now).
 
Close: ~22mn was the inflection where cost-per-die-area started increasing per process stepping, but cost-per-transistor plateaued a few processes later (though has indeed been increasing for several years now).
Maybe for intel (although i think GF also had a 22nm node), but TSMC and Samsung had no 22 nm node, they had 28, 20 and 16/14. I have a slide that shows transistors per dollar in 2015 for the independent foundries, where 28nm > 20nm > 16/14 nm. Unfortunately i can't find the source anymore so i don't know how to include it here.

Of course the smaller nodes still have many advantages, but transistors per dollar is not one of them anymore.