News TSMC reiterates it doesn't need High-NA EUV for 1.4nm-class process technology

[Admin]

TSMC reaffirmed that it will not use High-NA EUV lithography for its upcoming A16 and A14 process technologies, as Low-NA EUV tools combined with internal innovations provide sufficient scaling and performance benefits.

TSMC reiterates it doesn't need High-NA EUV for 1.4nm-class process technology : Read more

 

[kjfatl]

TSMC doesn't need it.
Intel does, for a good reason.

TSMC has a lot of EUV capacity in place and has a lot invested in this equipment. It's like having a fleet of cars with 70,000 miles on them. They will likely go down the path of double and triple patterning to get small features. Not only that, the High NA equipment wont' fit in their existing fabs.

Meanwhile, Intel has very little EUV capacity. For Intel, the only sane thing to do is to invest in the next generation equipment. They need to build completely new fabs, so the size of the equipment isn't an issue. They won't really need High NA for 4 or 5 years, but they will keep the equipment running for 20 years or more. In the meantime, they will have the option of doing single patterning on high volume product to decrease process time and cost.

 

[rluker5]

Intel said the same thing with not needing EUV for 10nm.
In the end they didn't, but it wasn't pretty getting there.

 

[ak47jar3d]

I wonder if 1.4 nanometer will be the end. How much can you keep shrinking transistors? The limit seems close but that is merely speculation.

 

[rluker5]

I wonder if 1.4 nanometer will be the end. How much can you keep shrinking transistors? The limit seems close but that is merely speculation.

1.4 is the beginning for High NA EUV. But they really aren't 1.4nm. Also High NA has reduced reticle size to go along with it's increased precision so it isn't all good news.

 

[ak47jar3d]

1.4 is the beginning for High NA EUV. But they really aren't 1.4nm. Also High NA has reduced reticle size to go along with it's increased precision so it isn't all good news.

The Name would have tricked me. Its seems crazy that they can even make 1.4 nm work.

 

[russell_john]

What no one is mentioning is EUV technology is owned and licensed by the US Government. Imagine sinking billions more into the new technology only to have a wannabe world dictator like Trump yank that license away because you hurt his feelings?

Bottom line is the main reason they aren't going forward with this is because no other nations trust the US Government anymore to not do knee jerk things

 

[thestryker]

All of the articles about TSMC and High-NA keep emphasizing the cost of just buying the machines, but I'd be surprised if that has much to do with it. High-NA EUV machines are much larger and heavier than EUV machines while requiring more power. While I doubt this means much of anything for TSMC's newest fabs it's a big problem for the rest. Retrofitting isn't a simple prospect and nobody is doing1:1 EUV replacements because the overall economics of only using High-NA don't work out yet.

 

[usertests]

I wonder if 1.4 nanometer will be the end. How much can you keep shrinking transistors? The limit seems close but that is merely speculation.

The names are fake. Pay them no heed.

There are more technologies that haven't been deployed yet. TSMC is making GAAFETs now, but we will see at least 1-2 variations of GAAFETs that are expected to be superior. For example, complementary field-effect transistors (CFETs).

3D stacking and packaging will become as big of a deal as the nodes themselves. Large amounts of cache/memory will be migrating into 3D layers in CPUs, and if they figure out how to have many CPU layers without melting chips, that will happen and processors will grow vertically like V-NAND did.

 

[phead128]

Intel said the same thing with not needing EUV for 10nm.
In the end they didn't, but it wasn't pretty getting there.

High-NA is an optical (lens) optimization of Low-NA EUV. It's nowhere near the huge gap between Low-NA EUV and DUV which Intel preferred for 10nm.

Intel hasn't even mastered Low-NA EUV, High-NA is no silver bullet if you cant even master the low version.

 

[jp7189]

I'm rooting for Intel, but it seems to me TSMC is further ahead than they are letting on. They are making specific definitive statements here about A14. The impression I'm left with is TSMC has a clear picture 3 years out whereas Intel is a bit shaky on what's going to happen in 6 months.

 

[TerryLaze]

I'm rooting for Intel, but it seems to me TSMC is further ahead than they are letting on. They are making specific definitive statements here about A14. The impression I'm left with is TSMC has a clear picture 3 years out whereas Intel is a bit shaky on what's going to happen in 6 months.

The picture of what intel wants to do in the next few years is very clear.
The execution of it is what many people don't believe in.
https://www.pcmag.com/news/intels-chip-roadmap-gets-a-new-14a-process

 

[jp7189]

The picture of what intel wants to do in the next few years is very clear.
The execution of it is what many people don't believe in.
https://www.pcmag.com/news/intels-chip-roadmap-gets-a-new-14a-process

Oh for sure their intentions have been made clear. But saying something specific like 15% higher performance and 20% denser for a process that isn't launching for 3 years is in a while different league the a graphic that has 14A on the right side.

One says pathfinding is done and they know exactly what it looks like. The other says management wants something and the engineers don't know how to make it happen yet.