News TSMC rumored to receive High NA EUV machines from ASML this year

[Admin]

TSMC is set to receive its first shipment of ASML's High NA EUV machine later this year.

TSMC rumored to receive High NA EUV machines from ASML this year : Read more

 

[kjfatl]

This makes a lot of sense. TSMC is in a position that there is no value for them to pay a premium for first delivery. For the next few years, they can do what Intel did with double and triple patterning with their 10nm+(+)(+) processes and utilize existing EUV equipment. Intel does not have this option since they have minimal investment in the last generation of EUV equipment. This will delay TSMC a couple of years, but it doesn't hurt them with the 5% of their business effected by this. Intel on the other hand needs it for 50% of their silicon in the coming 2 years.

 

[rluker5]

This makes a lot of sense. TSMC is in a position that there is no value for them to pay a premium for first delivery. For the next few years, they can do what Intel did with double and triple patterning with their 10nm+(+)(+) processes and utilize existing EUV equipment. Intel does not have this option since they have minimal investment in the last generation of EUV equipment. This will delay TSMC a couple of years, but it doesn't hurt them with the 5% of their business effected by this. Intel on the other hand needs it for 50% of their silicon in the coming 2 years.

Apple counts for more than 5%. If the smaller nodes are better Apple will want some chips on them.

 

[kjfatl]

Apple counts for more than 5%. If the smaller nodes are better Apple will want some chips on them.

TSMC can build Apple's chips using their existing equipment with double or triple patterning, vs single exposure with the new equipment. TSMC is reducing their capital expenses significantly, at the expense of more passes through equipment in the factory. Intel, on the other hand does not have the old EUV equipment so they have to buy new.

Double patterning and such to extend the process is nothing new.
Doing this will allow TSMC to extend the life of their existing nodes by 1 or 2 process generations, just like Intel did. This will give them time to build new fabs to stay competitive with Intel's leading edge fabs.

 

[thestryker]

Multipatterning is not cheap and it's definitely not something they want to be stuck doing. That being said this is largely in line with TSMC's history. They have rarely jumped on bleeding edge, but rather stuck with their long term development roadmaps. There's also the fact that Samsung is still having yield problems with their GAA nodes and Intel won't have 18A for external until 2026 at the earliest.

It makes sense that they wouldn't be in a rush to order volume quantities of High-NA machines.

 

[Mama Changa]

Multipatterning is not cheap and it's definitely not something they want to be stuck doing. That being said this is largely in line with TSMC's history. They have rarely jumped on bleeding edge, but rather stuck with their long term development roadmaps. There's also the fact that Samsung is still having yield problems with their GAA nodes and Intel won't have 18A for external until 2026 at the earliest.

It makes sense that they wouldn't be in a rush to order volume quantities of High-NA machines.

Everything is relative. It's a hell of a lot cheaper than spending $400 million on a high NA machine currently. Semianalysis did a detailed breakdown and showed multipatterning will be much more cost effective until sub 2nm. And it looks like TSMC agrees as this will be used for not N2 but A16 at the earliest.

But it doesn't matter at all. N2 is already being touted to being massively better than N3 and miraculously even shows good SRAM scaling for the first time in something like 10 years.

 

[elmeastr00]

“the U.S. is still investing EUV research so that it could bring its semiconductor supply chain home. While it will take years, if not decades, for this move to bear fruit, this should at least give chipmakers more options in the future, furthering technological advancements through healthy competition”

https://research.ibm.com/blog/high-na-euv-lithography-albany

the gool is to learn how to use asml machines in the overall proces of chip making (a good oven does not make one a good chef) .


This will be North America’s first and only publicly owned research and development center with a high-numerical aperture extreme ultraviolet lithography (High NA EUV) system. This machine from ASML can perform a new technique that could pave the way to developing and producing chips at nodes even smaller than 2nm.

 

[jp7189]

Intel, on the other hand does not have the old EUV equipment...

Intel 4 uses EUV, just not high NA.