Hi, all!
Recently, my PSU stopped working, so I went out and bought a new one. After installing the new PSU, the PC is turning on, but the POST screen is only showing up after like 40-50 seconds of Black screen.
So, after a lot of fiddling around, I discovered that this only happens if DIMM slots A1/A2 (either one of them or both) are populated. If I use slots B1/B2 (either one of them or both), the POST comes up in like 5 seconds, just like it used to be, so 10 times faster compared to the new behavior.
Yes, I already did many CMOS resets, both with the jumper and with the battery itself, and no, it is not a problem of the RAM sticks either, I've swapped them and I also tried others, as I have a lot of them, but the results are the same no matter what RAM stick or capacity, frequency or latency I use (plus, these RAM sticks worked perfectly before the PSU incident).
I have also used a PCI debug card, to see if there are any relevant error codes when populating the A1/A2 DIMMs, but I get the exact same sequence as in the B1/B2 scenario, the only difference being some huge delays during these phases:
So, here are my 2 questions in order to even dare and support any of my 2 theories:
Recently, my PSU stopped working, so I went out and bought a new one. After installing the new PSU, the PC is turning on, but the POST screen is only showing up after like 40-50 seconds of Black screen.
So, after a lot of fiddling around, I discovered that this only happens if DIMM slots A1/A2 (either one of them or both) are populated. If I use slots B1/B2 (either one of them or both), the POST comes up in like 5 seconds, just like it used to be, so 10 times faster compared to the new behavior.
Yes, I already did many CMOS resets, both with the jumper and with the battery itself, and no, it is not a problem of the RAM sticks either, I've swapped them and I also tried others, as I have a lot of them, but the results are the same no matter what RAM stick or capacity, frequency or latency I use (plus, these RAM sticks worked perfectly before the PSU incident).
I have also used a PCI debug card, to see if there are any relevant error codes when populating the A1/A2 DIMMs, but I get the exact same sequence as in the B1/B2 scenario, the only difference being some huge delays during these phases:
- d5 (Passing control to the uncompressed code in shadow RAM at E000:0000h. The initialization code is copied to segment 0 and control will be transferred to segment 0)
- d6 (Control is in segment 0, Next, checking if <Ctrl> <Home> was pressed and verifying the system BIOS checksum. If either <Ctrl> <Home> was pressed or the system BIOS checksum is bad, next will go to checkpoint code E0h. Otherwise, going to checkpoint code D7h)
- 0c (Detect type of keyboard controller and set NUM LOCK status)
- Old PSU: RPC 45000AB @450W, bought brand new in 2017, lasted for 7-8 years before it stopped working
- New PSU: RPC 50020LA @500W, bought brand new today
- Motherboard: ASUS P5Q-VM-DO
- CPU: Intel Core 2 Quad Q9400 @2.66 GHz
- RAM: 4x 2GB DDR2 Hynix (irrelevant, as the problem is the same with other brands, capacities etc.)
- GPU: nVidia GeForce 750 Ti (irrelevant, as the problem is the same with the integrated Intel HD Graphics)
- HDD, OS and drivers are irrelevant, as my problem relates to the huge delay of the POST screen, everything is fine once the Windows booting sequence starts. Also, the problem is the same with the HDD completely disconnected.
So, here are my 2 questions in order to even dare and support any of my 2 theories:
- is it possible for DIMM slots A1 and A2 to get only partially broken, enough to delay the POST up to almost 1 minute, but once it reaches that stage, to run perfectly fine? Because that's what is happening at the moment.
- are banks DIMM slots A1 and A2 powered by a different PSU line compared to banks B1 and B2, is this even possible? Or are all 4 DIMM slots powered by the same line? Because I don't have another PSU at the moment to rule out a possible issue with this new PSU I bought.
- any other ideas apart from my above-mentioned hypothesis?
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