The article said:
But what exactly is picosecond-level memory? It refers to memory that can read and write data within one-thousandth of a nanosecond or one-trillionth of a second.
The newly developed chip, named “PoX” (Phase-change Oxide), is capable of switching at 400-picoseconds, substantially surpassing the previous world record of 2 million operations per second.
Ugh. You say 0.001 nanoseconds, only to then state that it's actually 0.4 nanoseconds. By calling it "picosecond memory", they probably just mean that it's sub-nanosecond scale.
Also, why did you switch units? 2 MHz corresponds to a period of 0.5 microseconds or 500 nanoseconds. Written this way, it shows that it's a roughly 3 orders-of-magnitude improvement.
The article said:
Traditional SRAM (Static Random Access Memory) and DRAM (Dynamic Random Access Memory) can write data in times ranging from 1 to 10 nanoseconds.
Hmm... from what I've read, I think CPU registers are SRAM. That means it's not the SRAM, itself, that takes on the order of a nanosecond, but rather the switching & muxing to read and write it from an on-die array. I somehow doubt this new PoX memory is solving
that problem.
The article said:
flash memory like what's used in SSDs and USB drives is non-volatile, so it retains data even without power. The downside is that it’s much slower, usually taking microseconds to milliseconds.
Milliseconds is like... hard drives. IIRC, a fast SSD has a read latency of about 40 microseconds. The underlying NAND will be faster than that, but still in the realm of tens of microseconds.
The article said:
This speed limitation makes flash memory unsuitable for modern AI (Artificial Intelligence) systems, which often need to move and update large amounts of data almost instantly during real-time processing.
SanDisk would like a word with you:
I think the real win here is to get SRAM-level speeds with (hopefully) DRAM-level density and NAND-level power consumption. Equipping a machine with lots of RAM burns a lot of power. So, just reducing that power has immediate benefits.
As mentioned in the article, it also means that low-power devices like phones could stream in model weights directly from storage, without the model having to be resident in memory. This could save power and (if the density of their storage is similar to NAND), facilitate utilizing larger models than would otherwise be feasible.