My current processor is equipped with 6 cores and 12 threads. If I were to disable Hyper Threading, would it lower my CPU temperature?
Back in the Netburst days, Intel said that HT added ~5% to power and area cost. If your CPU is under less than 50% load, you may save some of that ~5%. If your CPU is under significantly more than 50% load (enough active threads to overwhelm a CPU without HT/SMT), the power reduction may be larger from having more under-used execution resources but you'll lose 30-40% in potential performance.My current processor is equipped with 6 cores and 12 threads. If I were to disable Hyper Threading, would it lower my CPU temperature?
It does in my case, but then it's also running considerably slower through a work load.My current processor is equipped with 6 cores and 12 threads. If I were to disable Hyper Threading, would it lower my CPU temperature?
My current processor is equipped with 6 cores and 12 threads. If I were to disable Hyper Threading, would it lower my CPU temperature?
Back in the Netburst days, Intel said that HT added ~5% to power and area cost. If your CPU is under less than 50% load, you may save some of that ~5%.
Thank you for all of your responses. Let me reiterate. If I disable Hyper Threading, my computer will be fine and no permanent damage will be done?
Here is a benchmark link:
https://www.userbenchmark.com/UserRun/22385934
The 5% difference is overhead, as in CPU with HT physically absent from the architecture vs CPU with HT disabled. With HT enabled, you have to add the extra power of execution units being active more often when the CPU is under heavy and sufficiently multi-threaded load to make HT do its thing.That's a very interesting statistic. I wonder if that's under load or idle? If under load, that means only a maximum 5% of resources are duplicated in the pipeline which I find hard to believe for HT to be effective. At the very least the ALU and some of the FPU would have to be duplicated as these comprise the vast majority of instructions.
The 5% difference is overhead, as in CPU with HT physically absent from the architecture vs CPU with HT disabled. With HT enabled, you have to add the extra power of execution units being active more often when the CPU is under heavy and sufficiently multi-threaded load to make HT do its thing.
There is no ALU/FPU duplication, the main thing HT adds is tagging of instructions and resources to keep tabs on which thread owns what. As CPUs get wider to increase instructions-per-clock, a single instruction flow (thread) becomes increasingly unlikely to contain a sufficiently diverse instruction mix with resolved dependencies within the re-order window to allow the scheduler to use every possible execution unit on every single clock tick. HT/SMT's performance gains come from enabling the scheduler to interleave instructions from two threads (more in some architectures like IBM's POWER8 which has SMT8) to increase its chances of filling more execution units more often without having to go as deep out-of-order or speculative to find eligible instructions.
Yes, you got the whole concept backwards. Mainstream CPUs are NOT getting wider and deeper to run multiple threads, they are getting wider to run one thread faster and have a SURPLUS of resources most of the time. SMT taps those under-used resources for extra performance at low architectural overhead cost.I may be mistaken, but I think we are discussing the same thing just a matter of semantics.
My temperature is usually between 60-65 degrees celsius with vsync on with all 12 threads.If the desire to disable hyperthreading is to lower the CPU temp...what are the actual temps you're seeing?
You may be applying a solution to a problem that does not exist.
That's under load?My temperature is usually between 60-65 degrees celsius with vsync on.
That's kind of what I meant. 😀 Maybe I'm just wording it poorly. (And yes I knew about register renaming) The concept of limited registers is long dead. But there's plenty of code that still use them and CPU's that remap them through renaming. Is an AX and AX on a HT CPU? I'll agree and say "No, it isn't". It is remapped. But I wrote it that way to illustrate point that resources are duplicated. In this case an AX from Thread 0 and AX from Thread 1 are both renamed. But they are still a duplication of resources from that resource pool from with operations are performed.Yes, you got the whole concept backwards. Mainstream CPUs are NOT getting wider and deeper to run multiple threads, they are getting wider to run one thread faster and have a SURPLUS of resources most of the time. SMT taps those under-used resources for extra performance at low architectural overhead cost.
Also, modern CPUs don't have fixed general-purpose registers like EAX/EBX/ECX/etc., they have a 128+ entries deep renamed register file, a reservation station that allocates a register file entry to each register write and then that renamed register entry becomes the new whichever-register in the context of subsequent instructions until the next time the whichever-register gets written.
Modern x86 CPUs are fundamentally RISC inside.
Renamed registers still aren't duplicates of anything regardless of how many hardware threads a CPU core supports. They have absolutely nothing to do with SMT and predate SMT (at least the Netburst flavor) by something like a decade. What does get duplicated is the tracking of what renamed registers represent each hardware thread's current state, perhaps that is what you meant to say.Is an AX and AX on a HT CPU? I'll agree and say "No, it isn't". It is remapped. But I wrote it that way to illustrate point that resources are duplicated. In this case an AX from Thread 0 and AX from Thread 1 are both renamed. But they are still a duplication of resources from that resource pool from with operations are performed.