Recent content by Fdchdfa

Do you know who spear headed/lead/started the whole EUV thing? It all began several decades ago in the US with a little something called the EUV-LLC initiative....which has members such as the DOE/Intel/AMD/Micron to research and commercialize EUV......Guess who signed a contract with the...

So you are telling me that the cache is on top of the CCD Flip chip, so AMD would need to do the following Perform Die thinning down to a few micrometer just above the transistor layer Then tunnel through the transistor level with wires to the backside of the CCD flip chip for the cache to...

Nooooo the L3 cache needs to be in a singular location accessible by all cores in a somewhat equal latency/access time, if you split the L3 into multiple block at different location then there would be performance consequences, that is why they place the L3$ in the middle, since if you place...

Woah I can't believe I have to explain this(I thought this is common knowledge) CPUs are flip chip, they flipped the chip before soldering onto the substrate, the cache chiplet is towards the side that is soldered onto the substrate, the bulk of the heat generating compute elements like the...

In case you blind, AMD's Epyc 7763 cost $7890, meanwhile Intel's pathetic 40 core 8380 cost $8099.