...Off toppic...
@ActionMan
There should be sub_forum for keyboards, where you should be moderator, so you will have the right to delete post instead of telling people that they need a new kbd.
You can say something in context about the topic, for a change.
@apache_lives
You should be ignored for your post, but take this as friendly advice, if you don't have something to say about the topic than STFU and don't blame your self with stupid discussions that are not subject for discussion. Read the topic first, than try to understand what is it about and why the author opened it, than read the allready written posts about the subjects and try to be usefull with your own opinion if you have any.
AMD ATTACKS DDR-II LATENCY PROBLEMS
No Intel, Pentium, Intel beeing better than AMD or vice-versa are mentioned in the topic....
You know what, I agree with "another wasted topic as many stated before!!!!!", from the people like you.
I am just wondering when some people will understand that hardware forum is not for wasting time with pointless insulting out-of-context discussions. It is place where people should share their IT knowledge(learning and teaching) and will post intelegent discussions relative to the topics.
Back to the topic now,
Large L3 should improve memory bandwidth, but will not solve the problem. When more is needed and there is no L3 available, the CPU will suffer from the high latency again. If the future K8L have more cores with more processing units, it will need much more data than the dualcore K8 we have today. The need for L3 will go further and further, considering that AMD wants to implement DDR3(its higher latency memory than DDR2). It is unefficient on one hand, and on other is expencive.
Quad channel is not a solution also becouse it will give only theoretical bandwidth and the latencies will be the same. On the other hand it will complicate the building of a system using 4 modules of RAM and the systems will be more expencive(motherboard and more memory modules)
What they have to do is to implement a kind of memory scheduler that will put in sequentional order the memory operations and will reduce the number of memory accesses when they are not needed.