AMD CPUs, SoC Rumors and Speculations Temp. thread 2

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I know, I think the thing people throw around is Performance = IPC * clockspeed (I know this is oversimplification), meaning that if what he said is true that it is performing 10-20% those percentages includes IPC and clockspeed. So my assumption that we're talking 5-15% over DevilsCanyon still stands no?
 
It depends on how the performance is taken. I remember when it was performance/watt then went to performance/$. It changes and depending on if they are going on what I would consider, performance/clock, then it could be 10-20%.

I am trying to find a good review that did a per clock comparison form Broadwell to Haswell but not easy to find.

Thats the only way to see what kind of performance we might see Zen up against.
 


Nobody really focused on per clock metrics because it was literally sub 5%, in most cases closer to margin of error (1-3%) type improvements which basically, meant the die shrink did almost nothing for it at all. Power figures decreased some...however...to be honest...broadwell was a still born child.
 
Kinda feel sad for AMD and Zen, they have to deal with Skylake which is faster, and by the time Zen arrives a new refresh from Intel will hit market which will probably add another 5-10% more performance compared to Skylake, this basically leaves Zen by a good 30% behind in 2016, that is a IF Zen gets released by 2016... remember Broadwell added 5-10% more performance compared to Haswell.
 


5% is what I would say at best and to be honest, die shrinks were almost never about the performance but more about the power. Even a Skylake CPU is a 65W TDP part and should perform much better than Haswell.



Zen will bout out in 2016. We can only wait and see. If Zen is that far behind then AMD will need to push a refresh to help close the gap out very fast.

Not sure they can afford to do releases so close together though....
 
Can AMD actually make it to Zen? I don't know anything about stock and such but AMD has plummeted to the lowest in their recorded stock history. Looks pretty bad to me, or does it not matter that much?

http://finance.yahoo.com/echarts?s=AMD&t=1d#{"range":"5d","allowChartStacking":true}
 


So far as I know Zen design has been finished and engineers are now working on Zen+.

Thus AMD only needs to make Zen chips and they have enough money for that. They are waiting for the foundry process to be fully functional to make the first ES (Engineering Samples). Last schedule I know, AMD expects to send the first ES to its partners in April 2016.
 


AMD has the money to produce Zen, and probably one die shrink, but after that, around 2018, their debt repayments start in earnest. They have to start getting some positive cash flow going before then. They're on a two year timer at this point.
 


Gamer not the best at the stock market but i see they owe 2.2 Billion can they pay that off in slowly or does it have to be all at once? They only have like 800million on hand and they are only worth about 1.3 Billion.
 


Which is why I think we all agree Zen is really important and pretty much will determine AMDs long term future. That's why I find it so frustrating when some people in this thread are so gleeful in their predictions of it's total failure.

AMD know it's important, and I think it's worth point out that in their current position any improvement could be quite significant for them. What Zen needs to do for AMD:

Allow them to sell the CPU's at a sensible margin (rather than giving what is essentially server grade silicon away for nothing as with the FX 8 core parts), and help them regain some market share. Those 2 requirements aren't that crazy- and for that to happen Zen needs to be good (e.g. K7 or even K10 rev 2), rather than spectacular (K8).
 


^^ Exactly.Most of these guys here,Do have the knowledge but are only talking on how Zen MAY become another Faildozer.Simple,- It just won't.Jim Keller is here and AMD's future is in it.They just can't let it go.If they reach Sandy Bridge/Haswell levels of Performance,Some Fine tuning can make them easily catch up with Skylake.
 
The last time that I checked Jim Keller couldn't do miracles. He has been operating under a limited R&D budget since his return to AMD, some of his initial projects at AMD have been canceled or delayed and AMD already admitted that Zen will not caught Intel on performance.
 


Have any breakdowns of the money AMD is giving to the CPU division, Juan?

While at that, you could also give us some numbers from Intel and how they spread it across the different R&D units. Maybe nVidia as well.

Cheers!
 


You know...you forget the talent that is at AMD with Jim Keller...

Some guys like Gustafson, Koduri, and a few others have made names in the PC industry...

Maybe you have heard of this guy?
 


So counter his arguments with solid technical data instead of demeaning him.

All you did here was to get yourself on to the Moderation Team's watchlist.
 

the real source is *its and giggles.it, not fudz.

let's critique the artistry.
the block diagram has red borders around it.
the color scheme is ye olde amd promo slide's.
thanks to the latest fiji specs, we know more about HBM. the leak says up to 16 GB - not impossible, but very difficult with 1st gen. it shoulda been 16GB HBM2 or something similar. i might be nitpicking, but the omission (or poor fact-checking by the fabricator 😛) stands out. another strange omission is the memory bus width. this is something amd drilled into people's head while promoting fiji and HBM1.

if we take the latest image, we see 32 green blocks of cpu and a red blotch of gpu (i am too old to count the blocks *yawn*). each "side" has 16 blocks of "c". could be a 16c/32t cpu block.
 


Serious sites with some knowledge of HPC-level stuff like HPC-wire are reprting the correct news. Generic sites as Fudzilla are reporting nonsense.

Those generic sites (bitsandchips, techpowerup, 3dguru, Fudzilla, Wccftech, techreport,...) are confounding the "EHP" (Exascale Heterogeneous Processor) described in the recent IEEE paper by AMD engineers with the "server APU" announced by AMD's Papermaster at FAD 2015.

EHP is an exascale-level concept that targets the year 2020 (according to pessimistic schedules exascale not will be achieved before the year 2025). AMD itself expect its exascale APU to be ready for commercial products by 2020--2023. Whereas the "server APU" that appears in last AMD roadmap targets the year 2017. It is this "server APU" which includes 16 Zen cores, Greenland GPU, HBM2,...

Not only the writes of those generic news sites confound both chips, mixe different technologies and make incorrect claims about EHP, but it is evident that they didn't even read the IEEE article:

(1) EHP doesn't use HBM2, because HBM2 doesn't provide the required bandwidth of 4TB/s needed for exascale requirements.

(2) EHP doesn't use Zen cores, neither is using Zen+ cores. EHP uses some future not defined core and, in fact, AMD engineers didn't decide if the cores will be x86 or ARM.

(3) EHP doesn't have a Greenland GPU, but a future unnamed architecture.

(4) EHP doesn't use DDR4 channels. AMD engineers make it clear on the paper that the memory architecture is dual with 3D-RAM plus NVRAM.

(5) The target process node is not 14nm.

(6) EHP is a concept and doesn't appear in any roadmap.

There are more confusions and issues, but the above list is enough to understand that EHP described by AMD in the paper is completely different to what is being said in many generic news sites.

In concrete the level of manipulation or laziness by the Fudzilla's author is incredible. The IEEE paper describes a 32 CPU core APU. He copy and paste the diagram from another news site and use it. This is the diagram

477857d63927323110c632064acbcd6a_L.jpg


The diagram shows 32 CPU cores. But that doesn't fit with the info that he has about the "server APU" in roadmaps. The server APU has 16 Zen cores. What then does Fudzilla's author? Does he investigates the issue? Does he call AMD? No. He claims that "We believe that this is a 16-core processor with 32 thread support and not 32 core as many reported."

It is needed a lot of imagination and a complete lack of understanding of most basic elements of tech to pretend that the small green bricks on the above figure are reporting 16 cores and 32 threads, with 16 threads on one side of the chip and 16 threads on another side!
 


I wonder if the draw calls/second will become the next TFLOPS. Higher is better in synthetic situations but never truly applies to the real world or gaming.

Mainly because that A10 iGPU beats the 5770C by 3x in draw calls/second but still doesn't beat it in actual gaming.

Guess we will see when DX12 games start coming out.
 

quite possible. seemed like raw gaming performance became driver dependent between intel and amd - better implementation in a game won that bench.
 


So, wait a tick...AMD had a previously unannounced interconnect system that is super fast, and super efficient, and might eventually trickle down to HEDT PC systems, but is currently aimed at HPC/Servers to compete with other solutions out there...? It was also based on freedom fabric acquired in the SeaMicro acquisition? I swear someone has mentioned that before...

 
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