News AMD Engineer Confirms Work on RDNA 3 Navi 3X GPUs at 5 and 6nm

[Admin]

In an overenthusiastic LinkedIn resumé, the member of AMD's Infinity Data Fabric Silicon Design Team also mentions work on the yet-to-be-launched AMD Instinct MI300 (6nm) GPU accelerator.

AMD Engineer Confirms Work on RDNA 3 Navi 3X GPUs at 5 and 6nm : Read more

 

[peachpuff]

Hope they'll be faster than the 6500xt...

 

[-Fran-]

Hope they'll be faster than the 6500xt...

I'm sure they'll be better than your comment

Regards.

 

[$h0nuff]

Having a hard time getting on board with this. One product line on two different nodes? The cost and risk factors alone..

Perhaps the dude was involved in tape-out projects for the same design on both nodes.

 

[LuxZg]

Hmm, this 5/6nm indeed is weird. Hybrid MCM doesn't make much sense either, EXCEPT if they are doing infinity cache on different node vs the execution units. Likewise, having two same essentially same designs on two nodes wouldn't make sense at all. If it said just RDNA3 on 5nm & 6nm I'd say ok, lower/higher end models on different nodes, or embedded GPU based on RDNA3 for CPU on different node. But saying specifically that eg Navi32 is both 5&6nm is weird... Except as I said, if the different node is just for cache (or some I/O die, which wouldn't be news at all).
Now that I just wrote that, if 31/32 are MCM it's enough that I/O & interconnect is 5nm and it would cover the weird two-node description. We're probably just reading too much into it.

 

[-Fran-]

There's a lot of reasons why the same architecture can be in multiple nodes, specially at the same manufacturer with "backwards compatible" tooling. Remember one of the promises of TSMC's 7 6 and 5 (IIRC) were all "backportable", so it would make sense for AMD to explore both options for the manufacturing. Imagine you make the same chip in 6nm and in 5nm, where one part clocks higher and the other doesn't, but the yields are basically the same; you can have 2 lines of products out of those. And then there's the multi-chip approach, which is more of an "obvious" possibility.

Then again, we may be reading way too much into it and it really doesn't mean much. Heh.

Regards.

 

[saltweaver]

Hope they'll be faster than the 6500xt...

Hope they'll be cheaper than 6500xt...

 

[jp7189]

I'm reading this as multiple 5nm gpus connecting through a 6nm chiplet with infinity cache, memory controllers, pcie. I see infinity cache as the key to "hiding" the problems of multiple gpu chiplets. Truly exciting if they can make it work. Imagine 2x gpus in the mid range, 4x on the top end, and up to 8x in the datacenter.

 

[JayNor]

Imagine 2x gpus in the mid range, 4x on the top end, and up to 8x in the datacenter.

Intel showed a quad Ponte Vechio OAM water cooled module in Jeff McVeigh's SC21 keynote. There are OAM accelerator baseboards that support 8 OAM modules.

 

[jp7189]

Intel showed a quad Ponte Vechio OAM water cooled module in Jeff McVeigh's SC21 keynote. There are OAM accelerator baseboards that support 8 OAM modules.

I can see that working well for AI/HPC, but I can also see some challenges for frametime consistency in gaming. That's why I think infinity cache is a breakthrough for gaming.