Archived from groups: comp.sys.ibm.pc.hardware.chips (More info?)
On Sat, 04 Dec 2004 11:48:33 -0500, Tony Hill <hilla_nospam_20@yahoo.ca>
wrote:
>On Fri, 03 Dec 2004 15:13:15 -0500, George Macdonald
><fammacd=!SPAM^nothanks@tellurian.com> wrote:
>
>>On 2 Dec 2004 15:54:29 -0800, yjkhan@gmail.com (ykhan) wrote:
>>
>>>Isn't the Itanium bus supposed to be yet another shared bus too, just
>>>like Pentium's bus? How exactly will it be able to compete against
>>>Hypertransport?
>>
>>I was just thinking the time frame for the "unified bus" corresponds with
>>the 2007 you mentioned for an on-chip memory controller, according to what
>>I've read. IOW the unified bus system framework would have be something
>>similar to Hypertransport's - no?... a processor network or cross-bar, with
>>a pipe to peripherals
>
><ding ding> I believe you've just given the winning answer to all of
>this George! That would indeed make sense, integrate the memory
>controller on both the Itanium and Xeon line and then just have some
>sort of HT-like connection to the outside work that could quite easily
>be common between the two.
Don't tell me - it'll be called err, 4GIO.
Rgds, George Macdonald
"Just because they're paranoid doesn't mean you're not psychotic" - Who, me??
On Sat, 04 Dec 2004 11:48:33 -0500, Tony Hill <hilla_nospam_20@yahoo.ca>
wrote:
>On Fri, 03 Dec 2004 15:13:15 -0500, George Macdonald
><fammacd=!SPAM^nothanks@tellurian.com> wrote:
>
>>On 2 Dec 2004 15:54:29 -0800, yjkhan@gmail.com (ykhan) wrote:
>>
>>>Isn't the Itanium bus supposed to be yet another shared bus too, just
>>>like Pentium's bus? How exactly will it be able to compete against
>>>Hypertransport?
>>
>>I was just thinking the time frame for the "unified bus" corresponds with
>>the 2007 you mentioned for an on-chip memory controller, according to what
>>I've read. IOW the unified bus system framework would have be something
>>similar to Hypertransport's - no?... a processor network or cross-bar, with
>>a pipe to peripherals
>
><ding ding> I believe you've just given the winning answer to all of
>this George! That would indeed make sense, integrate the memory
>controller on both the Itanium and Xeon line and then just have some
>sort of HT-like connection to the outside work that could quite easily
>be common between the two.
Don't tell me - it'll be called err, 4GIO.
Rgds, George Macdonald
"Just because they're paranoid doesn't mean you're not psychotic" - Who, me??
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