AMD Lists Ryzen Raven Ridge Desktop APU Details

[msroadkill612]

Chris fetters: Good input but a little fuzzy in parts. To be clear, yes this apu is a new ball game, but the killer is that all the apu gpu's memory can only be accessed via the restrictive (vs gpu ram) pcie3/Fabric lanes.

The DDR4 may be now 40-60GB/s, but 8x pcie3 lanes is only 8GB/s. Fabric surely will improve on this (maybe even double), but it aint 100GB/s+ of a discrete gpu.

 

[englandr753]

I'm more interested in the 2400G as an htpc for 4k support than gaming. I already have a threadripper 1950x with a 1080ti. So, with that said, I wonder if this apu has crossfire support with another amd discrete graphics card that may give it enough boost for smooth 4k support if the onboard graphics isn't enough. The older gen apus had this support for gaming purposes.

I will be watching this closely. =P

 

[Chris Fetters]

Chris fetters: Good input but a little fuzzy in parts. To be clear, yes this apu is a new ball game, but the killer is that all the apu gpu's memory can only be accessed via the restrictive (vs gpu ram) pcie3/Fabric lanes.

The DDR4 may be now 40-60GB/s, but 8x pcie3 lanes is only 8GB/s. Fabric surely will improve on this (maybe even double), but it aint 100GB/s+ of a discrete gpu.

Nobody listen to this guy/girl. He/she's COMPLETELY wrong. The IF connection to the CPU is using PCIe, but the iGPU has direct access to the integrated memory controller for as much bandwidth as your DDR4 can give it. (if iGPU's were limited to a PCIe x8 connection for memory access, performance would be about 1/10th what it actually is).

 

[Chris Fetters]

Also, what I just posted above has been the case for all AMD's APU's, and Intel's iGPU's as well. For a refresher/explainer PCIe is used in the same way on an iGPU as it is a dGPU; to connect it to the CPU (for which PCIe 3.0 x8 is PLENTY for any GPU on the market, even a 1080 Ti will barely lose any perf over such a connection; and FAR beyond what a 704SP Vega GPU will need). Just like with 8-core Ryzen, each half of the chip is DIRECTLY connected to the integrated memory controller, be it 2x 4-core CCX's, or 1x CCX + an iGPU, no PCIe involved whatsoever. This is why it's always been so important to use as fast clocked RAM as possible with parts using integrated graphics like this one. Raven Ridge for example gains nearly 30% performance with 3200MHz clocked DDR4!!! (this wouldn't be the case is msroadkill612 was right). Sadly he/she seems to have fuzzied up my explanation with totally incorrect facts (though I can totally understand where his/her misunderstanding came from) when he/she tried to "de-fuzzy" my already correct explanation, which lol honestly is kinda funny

 

[Chris Fetters]

So these APUs are basically an R7 with 4 ryzen cores and the other 4 being Vega connected by infinity fabric? Can someone clarify this?

Yessir, that's pretty much Raven Ridge in a nutshell (aside from the 1/2 shrunk L3 cache on the 4-core CCX, to bring down the price + free up a bit more GPU space). The die size is almost identical to the 8-core Zeppelin die (in regular Ryzen chips) as well, which makes sense considering they share a socket/chip package; they basically removed a CCX and stuffed as big a Vega based GPU they could fit where it used to be. Lol and from the results it looks like it worked out just splendidly!

 

[madmatt30]

^ the half amount of l3 cache isn't really anything to do with cost cutting , its simply a by-product of the g series only using half as many ccx units.

People may take it as being detrimental but the fact is because of the more efficient use of the ccx units the memory latency is drastically reduced compared to ryzen 1.

Its only in a few heavily multithreaded productivity apps that there is any deficit at all with the 2400g compared to the ryzen 1500x - & they are still pretty minimal.

To me , at this minute in time , they're the 2 best multi-purpose CPU's on the market by a fair stretch.

The only real hassle at the minute is bios compatibility on existing 320,350,370 boards.

 

[Gillerer]

^ the half amount of l3 cache isn't really anything to do with cost cutting , its simply a by-product of the g series only using half as many ccx units.

No, it most likely is to save die area for the integrated graphics.

L3 cache per CPU has been cut in 1/4 - not halved.

This is due to

• 
  ■ there being only 1 CCX (not 2); and
  ■ the L3 cache per CCX (and per core) being halved to just 4 MB/CCX / 1 MB/core.