AMD may have 4 instruction decoders up its sleeve.

[K8MAN]

I over-interpreted the lvl of sarcasm in his post earlier today and I realize that I really overeacted myself for nothing. It was just a heat of the moment thing and I hope I can be forgiven. I dont blow my top very often and it was just a stress thing today.

 

[dvdpiddy]

Action_Man, bring back Steve Austin. The sarcastic look on his face fit your personality so well :!:

Hell yeah! Damn it Action_Man i am going to make you change back to steve austin one way or another. :lol:

Aww, no-one seems to like Trex.

Cause t-rex is an animal and your name is Action_Man not Action_Dinosaur.

 

[dvdpiddy]

Wow, didn't see that one coming.

You cant group every AMD fan into this "horde" catogory you've created

I didn't create it and I've done no such thing.

I get offended whenever you treat me as such.

I never have.

I will not reply to any further nonsense so say whatever you may to get your last word in AM as I know you'll just be itchin to make me look like a fool one way or another.

See now thats totally unnecessary and I'm very dissappointed to hear that from you.

Word.


Thank you. 😀

 

[joset]

(...) By the time Intel intros CSI, HTX will be everywhere.

Maybe you've got 1/2 a point right, here. Intel, so it seems, doesn't plan to introduce an IMC, anytime soon: http://www.eweek.com/article2/0,1895,1976374,00.asp?www.dailytech.com
This is a crucial point, in my opinion, despite Intel's representative optimism; it will all depend upon Intel vs AMD performance & scalability, at the server space, and whether an on-die IMC will make the difference. If, as expected, Intel comes ahead with quad-cores & a FSB, it will also give'em time enough to ponder about a more sophisticated (programmable?) IMC approach (they've already shown an integrated on-package [mobile] VRM controller, which is as much interesting...) and CSI. In any case, both Intel's FSB & MCH approaches will certainly call for a replacement, whatever it'll be, in the mid-term. I, for one, just don't believe they'll make the same mistake as they did with insisting on NetBurst.

I'm sure AMD has learned enough about x64 to make a horse race of it no matter what Intel does. Next year the new buzzword will be Winx64.

Now, this is a different matter, alltogether: here, whatever AMD comes up with, Intel will be there, I'm quite sure. 64-bit is here to stay, no matter what platform you'll use; and, there's a portuguese saying "You might as well get your horse off the rain".



Cheers!

 

[knapper]

AMD will not use micro-op fusion. The philosophy of the two chip makers is slightly incompatible from an architectual standpoint. AMD already does some instruction tricks anyway. They may go further down this road.

Source:
http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2748&p=3

 

[gOJDO]

and, there's a portuguese saying "You might as well get your horse off the rain".

And what does it mean, I am missing the point with the wet horse

BTW, is that you on your avatar?

 

[joset]

AMD will not use micro-op fusion. (...)

Source:
http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2748&p=3

You state «will not use»; don't know about AMD's next microarchitecture details but, I find it most likely. Although different, they're not that different... and, uops-fusion could still be handy for the next AMD; unless anything really drastic comes up, uops-fusion does help ILP.

Straight from the link you provided:

Micro-op fusion does exist in the Athlon.

Cheers!

 

[joset]

and, there's a portuguese saying "You might as well get your horse off the rain".

And what does it mean, I am missing the point with the wet horse

Sort of giving up (your point) for stronger reasons or... in [even] more colloquial style, if you think you're right...

BTW, is that you on your avatar?

Well, yes... and no. Not that young... for a long while. Actually, I call it "my boss".


Cheers!

 

[GotaLoveIMC]

The design sounds like 40% better perf at dual core (can't compare quad)

Just a second, let me see if I got this straight. If people benchmark Intel machines before release showing a 40% performance increase (over the Pentium D), they can't be right. They're downright wrong. But if AMD even talks about releasing an improved uArch, it's a sudden 40% performance increase. :roll:
why not?
The Intel bott kissers started benching a chip 3 months ago which is not due to release till end of july, a 5 months gap. Today we should talk about K8L and 40% better performance than K8, possibly conroe. Becides, its only fair to compare 65nm to 65nm, new arch to new arch. I have seen people compare an overclocked 3.6 ghz conroe to opteron 146 stock speed, and the bott kissers go "wow it's killing amd". Nevermind that one is dual, overclocked, and new arch, vs the other is single core, stock speed, and not new arch. These intel fanboys have developed exterme inferiority complex.

 

[shinigamiX]

Luke... I am your father!
Is that your son?

 

[shinigamiX]

The design sounds like 40% better perf at dual core (can't compare quad)

Just a second, let me see if I got this straight. If people benchmark Intel machines before release showing a 40% performance increase (over the Pentium D), they can't be right. They're downright wrong. But if AMD even talks about releasing an improved uArch, it's a sudden 40% performance increase. :roll:
why not?
The Intel bott kissers started benching a chip 3 months ago which is not due to release till end of july, a 5 months gap. Today we should talk about K8L and 40% better performance than K8, possibly conroe. Becides, its only fair to compare 65nm to 65nm, new arch to new arch. I have seen people compare an overclocked 3.6 ghz conroe to opteron 146 stock speed, and the bott kissers go "wow it's killing amd". Nevermind that one is dual, overclocked, and new arch, vs the other is single core, stock speed, and not new arch. These intel fanboys have developed exterme inferiority complex.

Everyone just pretend to see a '*' where the 'u' is

 

[the_vorlon]

It seems to me the issue is not so much decoders, but rather execution units.

For example the old, belated, now near dead netburst structure could, at least in theory, decode/issue 6 instructions per clock cycle, but the bottle neck was that it could only retire two instructions per cycle.

By contrast, the K8 has 3 complex execution units, while Conroe has 3 complex + 1 simple execution units, allow more instructioins to be actually completed per clock.

The huge advantage Conroe has is that all three of it's SSE units are 128 bits wide versus 2 x 64 bits for the K8 - this is where the bulk of the performance gap seesm to be.

It should be, of course, noted that the number of instructions issued/retired is not quite comparable.

Both AMD and Intel take x86 instructions and break them down into simpler instructions internally. (Intel calls these mico-ops, AMD calls the risc86) - Due to micro-op fusion the Core cpus tend to do more work per instruction, while the K8 had a pretty good advantage on Netburst.

 

[carlhungis]

The design sounds like 40% better perf at dual core (can't compare quad)

Just a second, let me see if I got this straight. If people benchmark Intel machines before release showing a 40% performance increase (over the Pentium D), they can't be right. They're downright wrong. But if AMD even talks about releasing an improved uArch, it's a sudden 40% performance increase. :roll:
why not?
The Intel bott kissers started benching a chip 3 months ago which is not due to release till end of july, a 5 months gap. Today we should talk about K8L and 40% better performance than K8, possibly conroe. Becides, its only fair to compare 65nm to 65nm, new arch to new arch. I have seen people compare an overclocked 3.6 ghz conroe to opteron 146 stock speed, and the bott kissers go "wow it's killing amd". Nevermind that one is dual, overclocked, and new arch, vs the other is single core, stock speed, and not new arch. These intel fanboys have developed exterme inferiority complex.

Oh, so this is a "horde". I see. Someone who can't fathom the difference between a "Benchmark" of an actual chip and a number pulled out of thin air.

You do well to illustrate who has the inferiority complex.

 

[K8MAN]

It seems to me the issue is not so much decoders, but rather execution units.

For example the old, belated, now near dead netburst structure could, at least in theory, decode/issue 6 instructions per clock cycle, but the bottle neck was that it could only retire two instructions per cycle.

By contrast, the K8 has 3 complex execution units, while Conroe has 3 complex + 1 simple execution units, allow more instructioins to be actually completed per clock.

The huge advantage Conroe has is that all three of it's SSE units are 128 bits wide versus 2 x 64 bits for the K8 - this is where the bulk of the performance gap seesm to be.

It should be, of course, noted that the number of instructions issued/retired is not quite comparable.

Both AMD and Intel take x86 instructions and break them down into simpler instructions internally. (Intel calls these mico-ops, AMD calls the risc86) - Due to micro-op fusion the Core cpus tend to do more work per instruction, while the K8 had a pretty good advantage on Netburst.

Wouldnt it be interesting if AMD's 3 complex decoder's suddenly became 6 complex decoder's with the flick of a switch on dual core AM2

 

[Action_Man]

And wouldn't it be good if santa was real too.

 

[9-inch]

It seems to me the issue is not so much decoders, but rather execution units.

For example the old, belated, now near dead netburst structure could, at least in theory, decode/issue 6 instructions per clock cycle, but the bottle neck was that it could only retire two instructions per cycle.

By contrast, the K8 has 3 complex execution units, while Conroe has 3 complex + 1 simple execution units, allow more instructioins to be actually completed per clock.

The huge advantage Conroe has is that all three of it's SSE units are 128 bits wide versus 2 x 64 bits for the K8 - this is where the bulk of the performance gap seesm to be.

It should be, of course, noted that the number of instructions issued/retired is not quite comparable.

Both AMD and Intel take x86 instructions and break them down into simpler instructions internally. (Intel calls these mico-ops, AMD calls the risc86) - Due to micro-op fusion the Core cpus tend to do more work per instruction, while the K8 had a pretty good advantage on Netburst.

You are confused here.

Conrunt has 3 simple + 1 complex decoder, not the other way.

 

[killkillkill]

why do all the threads i've read about intel vs amd end up with squabbling.both amd and intel have their good and bad points,and neither is crap.i think some people start these threads coz they enjoy the flame war.
if no one can talk about amd vs intel without this(and i've seen it on a lot of forums).then why bother.
i have a intel machine at the mo' p.d 930@4ghz,and i have had amd machines before.i am not loyal to neither,coz i never got my loyalty card off amd or intel.
conroe is gonna beat amd for the time being,and even if its not here yet,it is coming,arguing about who is the best aint gonna stop it.and it does'nt change the fact that it will beat the a64,possibly until k8l comes out.
until then i think we will all have to accept that for the moment intel is in the lead.

 

[Rustol3um]

Well, AMD's policy is to under-promise and over-deliver. Intel is quite the contrary. Remember when they were talking about how they'd have 10 GHz CPUs?

I beg to differ. I remember when AMD was talking up the thoroughbred B cores. As in the 2800+ XP. I waited and waited and waited.....to my chagrin the only core they did release was the 2700+. Oh and how long did we wait for Athlon 64? I remember them pimping it for a couple of years all the while P4 Northwood was kicking AMD's butt. Northwood was the best of the P4s imho until the release of conroe. But AMD did deliver in the end.....just took longer then promised. So both companies are guilty to some extent or another..

 

[RichPLS]

True, but to the "horde", AMD can do no wrong, also it is a non-profit compassionate company who devotes its resources to globally combat of poor and needy children, and fights capitalism and corporate mentality...

 

[MU_Engineer]

I agree- the Pentium M promised nothing- it was a side project in Israel to make a notebook CPU that didn't eat watts like the P4s did and that happened to work very well. The Core 2 is being hailed by Intel as the Second Coming of Jesus, so it better deliver holy hell in a CPU socket to "overdeliver" with the promises Intel has made.

 

[MU_Engineer]

Northwood was the best of the P4s imho until the release of conroe.

The Woody was a decent chip as far as P4s go. They beat the Tualatins, killed the awful Willies, and even though they ran hot, they didn't run *that* hot, at least not in Prescott terms. Oh, and my "Got a Woody?" desktop background on my laptop also gets a lot of comments, and a lot of disappointed looks when I explain what it REALLY means 😀

 

[Action_Man]

Northwoods run quite cool especially in comparison the athlon xp series.

 

[MU_Engineer]

Yes, the Northwoods ran cooler than the Athlon XPs of that day. Those AXPs had a bad heat problem and both the AXP and P4 run significantly hotter than the PIII and Athlon Classic/T-Bird that preceded them and also than the P-M/Core and K8 that superceded them.

 

[Rustol3um]

Northwoods run quite cool especially in comparison the athlon xp series.

this is very true..I had my P4 up until very recently, I had a 2.8 OC to 3.2 on Watercooling running stable for 2 years ..I also had both series at the same time, and the P4 kicked the crap out of the AMD chip.the 2700+ would not OC very well despite what type of cooling you had with it...funny how things change and then come back full circle....