[citation][nom]Alien_959[/nom]Just asking. Is it a great idea to make propearty dual core based on Phenom something with 1 mb L3 cache an greater clock speed. Because the software is more optimised for dual core and greater clock speed would have greater impact on performance. Opinions?[/citation]
That's actually pretty bad idea. I've done some test with 9850 and it only out-take E4300 at 1.8GHz when data size is twice as large as E4300's L2. Granted that CnQ is on in those test, but at 1.8GHz same thing happens. Agena core is superior to K8, but still about 20% behind C2D clock for clock. Most of the deficiency can be attribute to failure to utilize enough CPU clocks in single threaded process. Phenom only shines when you can utilize at least 2 cores. In that case, C2D is no match to Phenom x3 or x4 clock for clock. Those SuperPi 1M test is an indication of the raw power of a CPU, and current AMD offerings are just not as good as Intel ones. However, if your code and data size is way larger than L2 cache, AMD starts to have an edge. But just look at the size of some Intel CPU's L2. They need to improve L3 size, IMC and also IPC in order to catch up Intel. From Phenom's architecture, cache area is actually relative small compare to Intel C2D. There is no point cutting L3 when most failure occurs on cores.