News AMD says AM5 platforms can support CUDIMMs, but won't commit to a release date

I don't think it should be of any surprise that it's memory controller and not platform that needs to support it. CUDIMMs are just UDIMMs with a CKD which means the CPU needs to be able to properly interface with the CKD and that's the only change.
 
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My guess, next gen X970 MB's for Zen 6 will support CUDIMMS, B950 won't.

I'm leaning more and more to waiting out Zen 5 for Zen 6 if for nothing more than the 12 cores ccd's. A 10800X3D with 12 cores would be a beast for work and play.
 
Memory support has nothing to do with chipset anymore, it's now all 100% up to the memory controller on the CPU. As long as the memory controller can recognize the CKD then it'll end up being automatically configured, otherwise the memory controller ignores the CKD entirely and that's what bypass mode is. Worst case is the memory controller freaks out and just gives up the ghost.
 
How is the performance scaling in zen 5 beyond 6400mhz?

Intel Arrow lake needs all that memory speed cuz it has worse latency compared to zen 5.
It depends on the application.
Right around 6100MHz to 6400MHz (depending on CPU, MB, etc.) is where the memory controller will have to be dropped to 1:2 speed instead of 1:1. But, once you get the memory up to (and above) 7000MHz or so, some applications will run marginally faster. It's not a major increase in performance unless you're running specific memory-intensive benchmarks.

Also, AMD has some baked in performance (lowered latencies) when running the the fabric/memory controller at 2:3 (2000MHz IF and 3000MHz controller/RAM), which is why AMD always suggests running the IMC and memory at 3000MHz (6000 DDR).
 
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