AMD SAYS IT CAN STILL BEAT INTEL CORES WITH OPTERONS

[TechnologyCoordinator]

About Conroe
Well there are benchies, and other builds using similar technology that curently rock hard. No matter how you take it Conroe will beat AM2 clock per clock. By how much,well i predict somewhere around 15% .
About AM2
We do have a THG benchmark that is of course coursed with the mem. controller bug(or so you insist) but we also have a Inq. article stating that AM2 with DDR2 800 will bring a minor 3-5% improvement over AMD on 939 with DDR that certainly can be placed as a fact.

AM2 will launch 2 months earlier than Conroe.

Not to mention that the Conroe hype is also infecting AMD people. They have finally admited that they'll have some nasty competition.

BTW Poorion X2 will be on the shelves soon. I can't wait to see how poo or not poo it performs.

CompGeek has a very level head about this and makes these very valid points:

- Conroe will have significant gains, probably not as much as Intel says, but still enough to best any of AMD's products
- AM2 is a step in the right direction, but is only a minor improvement
- The competition will be very, very nasty. Which is great for us!

 

[darth_farter]

wel, in my humble opinion Intel did AMD (and its own fanbois) a big favor previewing Conroe at such an early stage.

AMD now has loads of time to prepare for it if they underestimated it.

this should be very interesting as judging by the way AMD are being quiet, last time the hammer was released (when everybody was talking and fanbois dreaming of Northwood>>>Axp) which showed some good advances.

Now that Intel is doing the preview this manner I expect also AMD to release their ace at the same time frame. (If not I guess amd sucks 😛)

anyway, I seriously doubt that Conroe will stand alone as leader of performance for long on the desktop.

oon the laptop Turion X2 will be much more refined (Xbit) and more then likely in Intel's Core duo league, and on the server area I heard (inq) there's a floating point monster waiting for woodcrest's release.

anyway, glad that we're going to see some good improvements from both at the end of the year.

 

[CompGeek]

Yup It'll be quite a clash. And of course it will benefit the costumers.
I'm already in the process of getting some of my future rig components. I'll skip of course the mobo and CPU since i'm not in a very big hurry.
My main concern with Conroe is that the posted prices may very well rise if it proves to be good. With AM2 the availability of DDR2 800mhz bugs me,in fact that goes for both.
DDR2 is a step in the right direction. It may not bring much but DDR is already showing strains. DDR2 should give some breathing space.
A year full of surprises(mostly nice i say) is expected.

 

[yankeeDDL]

I think we should also keep in mind that the Pentium 4 is a real piece of junk: no wonder Conroe is considered a "leap forward".
AMD may not be able to improve as much as Intel did cause its starting point is an architecture which is already valid.

This said, IF Conroe is really 30% faster and IF Intel prices Conroe LESS than the current P4 (P4 costs much more than a comparable Athlon: can you believe it?!?!?) then we may see a battle.
How many people would pay $1000 premium for 30% better speed? Might as well spend them toward a dual (or quad) video card system.

Last, but not least, IMHO, Intel made a mistake sticking to the FSB. It does not seem to be an architecture with future compared to an integrated mem. controller. Maybe it was a matter of patents.

I hope AMD will keep up with Intel ( actually, I hope it'll beat the **** out of them ): these past 2 years we've finally seen low prices for good CPUs: something rare if you ask me.

 

[Herr_Fritz]

amen Darth_Farter

Best thing for us is major competition between the two. It doesn't really matter if Conroe is top dog or whatever AM2 chip is top dog. We win regardless as they try to beat each other over the head with their latest silicon. I'm happy Intel has such a good chip 'cause it forces competition.

Fritz wins

 

[YO_KID37]

Can't INTEL just take their new PENTIUM D's and LIKE add HT to each of the CORES? Id that possible. Lol i know that INTEL FAns are gonig to jump me and beat me down with logic and TEchnical Impossibilities. But if i had the Money i'd get a Dual CORe with HT and NetBurst with Conroe Arcutucture and AMD's Powersavingnes. yeah i'd have the best of Bothworlds.

 

[tchiwam]

I actually hope that they will have the memory controller out of the chip, a little bit like the IBM Power5 architecture, each memory bank has it's own controller. AMD would only need to change the memory controller for more HT channels, then connect these memory controllers to the HT.

This would scale the memory without having to wait for the next CPU generation and keep latency at an acceptable level. It would also allow memory raiding, just like an hard disk raid 5 where one bank is a safety for the others. Hot swap memory would then be possible.

This would kick the ass of Intel, really... then again Intel could do the same, instead of putting a full memory controller they would put a simple link to the memory controller.

 

[yankeeDDL]

Hyper trading does not scale well with multiple cores (as far as I know).
Conceptually, HT rearranges threads to execute two at the same time in the same core. In order for that to function across multiple cores you'd have to be able to juggle around threads which I think it'll require much more complex integration between cores.
Infact, I think HT is sort of limited when multiple cores are present because sharing the tasks across cores may reduce the chances of being able to have threads to run on the same core.

 

[yankeeDDL]

Interesting perspective. Never heard of redundant RAM before.
I think having 4 independent access is in the roadmap for AMD: that pretty much means one controller per bank in most systems today.

The integrated controller theoretically is much faster and requires less idle cycles than an external controller before the data is available to the CPU. I'm sure there is a turning point when the other architecture may be beneficial.

 

[joset]

I actually hope that they will have the memory controller out of the chip, a little bit like the IBM Power5 architecture, each memory bank has it's own controller. AMD would only need to change the memory controller for more HT channels, then connect these memory controllers to the HT.

Actually, AMD's IMC connects to system memory through a dedicated 64-bit bus, which includes the crossbar switch (XBAR), the memory controller (MCT) and the DRAM controller (DCT); no HyperTransport links, here (and, I doubt they'll ever be used for "plain jane" DDRx). Even with serial system memory...

This would scale the memory without having to wait for the next CPU generation and keep latency at an acceptable level. It would also allow memory raiding, just like an hard disk raid 5 where one bank is a safety for the others. Hot swap memory would then be possible.

Intel has already implemented this feature (RAID 0) in its FBDIMM AMB (Advanced Memory Buffer) chip. FBDIMM is an Intel protocol; and, works serialy. That would probably fit within the HT specs. But... it's an Intel protocol... (see JEDEC).


Cheers!

 

[tchiwam]

I actually hope that they will have the memory controller out of the chip, a little bit like the IBM Power5 architecture, each memory bank has it's own controller. AMD would only need to change the memory controller for more HT channels, then connect these memory controllers to the HT.

Actually, AMD's IMC connects to system memory through a dedicated 64-bit bus, which includes the crossbar switch (XBAR), the memory controller (MCT) and the DRAM controller (DCT); no HyperTransport links, here (and, I doubt they'll ever be used for "plain jane" DDRx). Even with serial system memory...




They are now using 128bit interface, if I am not wrong, imagine if they want to go to 256 bit interfaces or more, I'd say that's a lot of pins for nothing, the number of rank to be used will always be limited, unless there is some kind of buffers. Routing will get harder and harder while the limit will be the CPU line driver. OK have to say, you are right, could they make this nifty solution, even if it's using a dedicated interface, with low pin count ?

This would scale the memory without having to wait for the next CPU generation and keep latency at an acceptable level. It would also allow memory raiding, just like an hard disk raid 5 where one bank is a safety for the others. Hot swap memory would then be possible.

Intel has already implemented this feature (RAID 0) in its FBDIMM AMB (Advanced Memory Buffer) chip. FBDIMM is an Intel protocol; and, works serialy. That would probably fit within the HT specs. But... it's an Intel protocol... (see JEDEC).

Cheers!

I know Intel has this, I tought it was "raid1", The thing is why have real mirroring of memory if someone could have a raid5, increase memory BW and make it fault tolerant. Considering ECC and raid5, it means that the ECC can do it's job, flag the operator and get it fixed. To get a failure the ECC of 2 bank as to be faulty at the same time.

I just think that for motherboard design it would be easier and better. Someone could buy a 8xx and stuff it with memory all around and get a crazy memory BW. OK the latency would be a bit higher, but still better than part of a NB.

 

[joset]

They are now using 128bit interface, if I am not wrong, imagine if they want to go to 256 bit interfaces or more, I'd say that's a lot of pins for nothing, the number of rank to be used will always be limited, unless there is some kind of buffers. Routing will get harder and harder while the limit will be the CPU line driver. OK have to say, you are right, could they make this nifty solution, even if it's using a dedicated interface, with low pin count ?

You're right. 128-bit interface.
As for the pin-count issue you addressed, I don't see, in the near term, drastic improvements: Socket F is going above the 1000 pins' mark (1207, if I'm not mistaken) for up to quad-core (though it's nowhere near IBM's POWER5+ which, like POWER6, has an IMC!); however, for the time being, I believe an IMC still has the advantage over a shared, parallel bus.
Speculating, I think that a fully-programmable IMC would solve a lot of issues... but, is this possible/viable?

I know Intel has this, I tought it was "raid1", The thing is why have real mirroring of memory if someone could have a raid5, increase memory BW and make it fault tolerant. Considering ECC and raid5, it means that the ECC can do it's job, flag the operator and get it fixed. To get a failure the ECC of 2 bank as to be faulty at the same time.

I just think that for motherboard design it would be easier and better. Someone could buy a 8xx and stuff it with memory all around and get a crazy memory BW. OK the latency would be a bit higher, but still better than part of a NB.

Right again. RAID 01.
If I understand it correctly, you're referring ECC doing a better job than... RAID 01. If it's the case (and leaving the price issue aside), FBDIMM + AMB has much more to it than just RAID 01 redundancy (it's easy to find FBDIMM specs on the net...).


Cheers!

 

[joset]

Ah! By the way, hello Finland! ; )

 

[49ers540]

Conroe will make you cry that you don't have one. You AMD nutcase brag 😀 how good the chip is and here is the response to your chip. Conroe yourself and take it like a man! 😀

 

[Action_Man]

I doubt they'd be having yield problems, especially on the 512k ones. Demand is high and they're reluctant to make them on 90nm.

 

[Action_Man]

Yeah, hehe. It would be cost driven.

Conroe is being phased in slowly which was discussed in another thread so the pressure isn't really on, especially with the all cool new things they've got lined up.

 

[Action_Man]

Can't remember. Here the link to the roadmap. Link.

I agree, seems odd not to. Perhaps they're preparing to get woodcrest out asap?

Thanks. 😀

 

[phial]

And the point is?

And yes, with Conroe they will live up to the hype.

How do you know?

Do you have proof?

Manufacturers make claims all the time and rarely live up to them.

What is so special about the Conroe?

How much is Intel paying you???????????????

Yup. Links or shens. I love how Intel fans usually brag about how good Intel is going to be... after a few years you have to begin wondering when its actually going to happen.. 😉

 

[49ers540]

You must be a newbie to the cpu world. 😳 8O

 

[yankeeDDL]

Respectfully disagree. http://www.newegg.com/ProductSort/SubCategory.asp?SubCategory=343
Single core Athlon 3700+ are running just a tad cheaper than Pentium 4 641 (3.2GHz).
Considering the extra power consumption, the extra cost for cooling and the electricity bill, I think single core, except for the top-of-the-line, is a no brainer.
Even there, Pentium EE 840 and 955 go for ~$900 and ~1000 resp.
For ~800/1000 you get an FX57 or FX60: undoubtely more efficient and faster in all benchmarks except, maybe, encoding.

In the dual core you might be right: Pentium D 840 (3.2GHz) is $358. For $355 you get an X2 4200+ which is just a bit slower (http://www.tomshardware.com/2005/08/01/dual/page12.html).
However, again, the thermal envelope is just a no match for Intel.

As I said, if Conroe delivers what promises at the same price of the Pentium 4, then yes, AMD prices will have to drop. 6 months from now, however, we'll be comparing new, top-of-the-line Intel CPUs with over 1-year old AMD ones (the THG article above is from Aug 1st 2005).

I don't know, like everybody else, if AMD will have something as good or better than Conroe by the end of Q3. My guess/fear is no, however, I'm confident that in early 2007 we'll have some pleasant surprise.

Oh, and by the way, I agree 100% on the 65nm: crucial for the future of AMD.

 

[dvdpiddy]

AMD tries to tell us a lot of things >_>

ycon shut up geez intel sold us prescott and what happened you loved it cause of your mindless fanboyism. by the way nice find 9-inch and dudes i'm gone for a day and the forum is still the same ol crap geez :roll:

 

[yankeeDDL]

Ok, thanks: i think we're on the same paqe now.
Except I'm still and AMDer :lol: