News AMD Unveils Zen 4 CPU Roadmap: 96-Core 5nm Genoa in 2022, 128-Core Begamo in 2023

ezst036

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I want to see AMD adopt a big.LITTLE strategy in the future. They have those Jaguar/Bobcat etc cores, it would be nice to see them used across the board for the low/mid end. Having this many cores, it makes a lot of sense to have even 10 or so of them little efficiency cores. Threadripper is aimed at a big core userbase that presumably wants max threads at all times and has the specialty software to leverage it.

I would think that servers would also be a big beneficiary of efficiency cores given the electric-bill sensitivity of many data centers.
 

Josh Mahurin

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"The 128-core Genoa will come on the 5nm process in 2022, while the 128-core Bergamo, also on 5nm, will come to market in 2023 " I think you meant 96-core Genoa.
 

jeremyj_83

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I want to see AMD adopt a big.LITTLE strategy in the future. They have those Jaguar/Bobcat etc cores, it would be nice to see them used across the board for the low/mid end. Having this many cores, it makes a lot of sense to have even 10 or so of them little efficiency cores. Threadripper is aimed at a big core userbase that presumably wants max threads at all times and has the specialty software to leverage it.

I would think that servers would also be a big beneficiary of efficiency cores given the electric-bill sensitivity of many data centers.
Datacenter really won't benefit from big.LITTLE. Due to virtualization you are always loading the cores and things that are mission critical need absolute best CPU performance. For example lets say you have a small 4 node datacenter. In an ideal scenario all your hosts will be running at 50% CPU capacity all the time. That way you have leftover cycles if a host should fail. In theory you could have 2 hosts fail and only then be at max CPU usage. Basically you don't want your cores sitting idle so there is very little use for big.LITTLE.
 
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VforV

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Yup, if MLiD is correct AMD's big-Little will be a combination of Zen last gen with Zen new gen. Described in very simple words.

Their ciplets are already smaller in size than intel's tiles, or whatever they are called. That's why they also have better power consumption while using full sized cores.
 
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Sluggotg

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Just wait until AMD releases the "Bulldozer" Cores! (Joking) Impressive stuff. It is shocking how fast things change. I remember when they announced that "The Laws of Physics prevent making a Transistor smaller than 0.18 Microns". Now we are making them smaller than 5nm, (0.005microns).
 
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taz-nz

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I know that, but do you think at some point they'll bring that to their Ryzen chips as well?Why do they only reserve that for TR?
To have more memory channels you need a lot more pins on the CPU and thus a much larger CPU package, as well as a much more complex and expensive motherboard, due to the all the extra traces you need to connect extra memory channels. DDR5 solves the issues of high core count desktop CPU needing more memory bandwidth to keep them feed with data, so adding more memory channels will have little effect for most desktop tasks, Threadripper & Epyc need the extra memory channels as the have a lot more cores to feed and they are designed for tasks that are much more memory intensive than most desktop applications.

Basically it would make the CPU & Motherboard a lot more expensive, for little gain in most desktop apps, DDR5 solve the issue for now, and 3D-vcache also deals with the issue without a lot of extra expense.
 

Osiris4.0

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To have more memory channels you need a lot more pins on the CPU and thus a much larger CPU package, as well as a much more complex and expensive motherboard, due to the all the extra traces you need to connect extra memory channels. DDR5 solves the issues of high core count desktop CPU needing more memory bandwidth to keep them feed with data, so adding more memory channels will have little effect for most desktop tasks, Threadripper & Epyc need the extra memory channels as the have a lot more cores to feed and they are designed for tasks that are much more memory intensive than most desktop applications.

Basically it would make the CPU & Motherboard a lot more expensive, for little gain in most desktop apps, DDR5 solve the issue for now, and 3D-vcache also deals with the issue without a lot of extra expense.
What about USB 4?I know people say that it's a solution in search of a problem and I guess they're mostly right.Whether it's USB, or Thunderbolt 4 I really just want to connect and power my external drives through the same 1 cable one day instead of the clunky power plugs that I have to use now...and looking further down the road, the external SSDs that would actually be able to take advantage of that speed if they get a lot closer to HDDs in $/GB.
 
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korekan

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next gen cpu should always be like this. lower watt more performance not performance increase by 15% more watt (doesnt matter because its cheap right? well until suddenly your country have power crisis, even its cheap but cant provide)
 

hannibal

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I know that, but do you think at some point they'll bring that to their Ryzen chips as well?Why do they only reserve that for TR?
The price!
The price difference is substantial compared to benefit normal users get. If you need more memory speed, they have Threatrippers for those customers and above those their data center product.
 

PCWarrior

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Yup, if MLiD is correct AMD's big-Little will be a combination of Zen last gen with Zen new gen. Described in very simple words.

Their ciplets are already smaller in size than intel's tiles, or whatever they are called. That's why they also have better power consumption while using full sized cores.
Except that they are not smaller when compared like for like. Not by a long shot. Intel is doing hybrid in a monolithic die (the 12900K has die size of 209mm2) that contains 16 cores (8P+8E). AMD is doing MCM with 2 octacore compute chiplets (2x80.7=161.4mm2) + one IO die (125mm2) that add up to a total area of 286.4mm2. And let’s not forget that Intel’s die includes several features (that take a lot of area) that AMD cpus don’t have: igpu, AVX512 units (and that with several extensions), PCIe5, more chipset lanes, a memory controller with support for both DDR4 and DDR5, etc). If we were to exclude those, we are talking about Intel using less than half the total die size. As for of the 4 tiles in Sapphire rapids each has 18 cores (at first 14 active). Again over double the cores per tile so not comparable. And these cores are bigger in compute resources and with more features than Zen cores. And we don’t have dimensions for those yet. In any case AMD assembles a 9-chiplet monstrosity (8 compute chiplets plus 1 io die) with a much bigger total area .And they are not doing this out of choice but out of necessity. If AMD were to produce a larger chiplet die they would have yield issues. Intel on the other hand, having full control of their process (which now is anyway superior to TSMC's 7nm) can optimise for larger die size production in a way that in mass production can have just as good (or about as good) yields as AMD has with their smaller chiplets.
 
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TJ Hooker

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Datacenter really won't benefit from big.LITTLE. Due to virtualization you are always loading the cores and things that are mission critical need absolute best CPU performance. For example lets say you have a small 4 node datacenter. In an ideal scenario all your hosts will be running at 50% CPU capacity all the time. That way you have leftover cycles if a host should fail. In theory you could have 2 hosts fail and only then be at max CPU usage. Basically you don't want your cores sitting idle so there is very little use for big.LITTLE.
Little cores aren't just about efficiency at low loads, they're also about maximizing the multithreaded performance for a given power envelope. I think they're better in terms of performance per die area as well.
 

D1v1n3D

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Except that they are not smaller when compared like for like. Not by a long shot. Intel is doing hybrid in a monolithic die (the 12900K has die size of 209mm2) that contains 16 cores (8P+8E). AMD is doing MCM with 2 octacore compute chiplets (2x80.7=161.4mm2) + one IO die (125mm2) that add up to a total area of 286.4mm2. And let’s not forget that Intel’s die includes several features (that take a lot of area) that AMD cpus don’t have: igpu, AVX512 units (and that with several extensions), PCIe5, more chipset lanes, a memory controller with support for both DDR4 and DDR5, etc). If we were to exclude those, we are talking about Intel using less than half the total die size. As for of the 4 tiles in Sapphire rapids each has 18 cores (at first 14 active). Again over double the cores per tile so not comparable. And these cores are bigger in compute resources and with more features than Zen cores. And we don’t have dimensions for those yet. In any case AMD assembles a 9-chiplet monstrosity (8 compute chiplets plus 1 io die) with a much bigger total area .And they are not doing this out of choice but out of necessity. If AMD were to produce a larger chiplet die they would have yield issues. Intel on the other hand, having full control of their process (which now is anyway superior to TSMC's 7nm) can optimise for larger die size production in a way that in mass production can have just as good (or about as good) yields as AMD has with their smaller chiplets.
Didn't AMD announced Zen 4 will have avx 512, 3dvache and more cores at the same TDP envelop with 5nm chiplet, also more skus been leaked to have iGPU via up to Navi 12gcores AMD is not sitting idle. They are at the fastest advancement pace they have ever been at with more revenue than ever in their history and a very bright chip engineer at the helm CEO Dr Lisa Su. AMD was in the red for a good decade verge of bankruptcy this woman changed the direction and vision of AMD, she was voted in one of the top 100 brightest minds in the world before ever touching AMD. The 5950x vs 12900k lack of eco cores still more efficient under any given LOAD.
AMD wins with 3dvcache it will take the thrown by at least 7% in January march with out a clock boost but AMD loves to add an additional 100 to 300mhz per iteration we are going to see more performance on some skus. For me my 3800x has got me by just fine from launch day I will be buying a 3dvcache to top off my x570 system before building new in 2023 with the am5 platform it is AMD's time to have better memory with new platform launch via Intel testing the tech and waters first get the resources built up for them to come swoop the glory lol. Big little breaks a lot of video games new and old so I will not bet on them for a long time to drive the gaming market. Roughly 1.5billion PC gamers in the world and growing. AMD is taking it no one can argue it anymore sure this is a great idea by Intel in theory but it is still broken for their so called gaming crown they have over 20 modern games not playable without disabling the eco cores in bios lol.
 
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PCWarrior

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Didn't AMD announced Zen 4 will have avx 512, 3dvache and more cores.
Well, we don’t have the dimensions for their new chiplets where these features/extras are included. But even if we did that wouldn’t provide an accurate comparison between Intel's and AMD's approaches as Zen 4 is on 5nm and has a process advantage over Alderlake/Sapphire Rapids on Intel 7. The best is to compare existing parts on equivalent nodes (Intel 7 vs TSMC 7nm). Besides with AMD using 3D V cache that's essentially another silicon die stacked on top of the compute die. It means AMD is using even more silicon (x2 the area).

AMD wins with 3dvcache it will take the thrown by at least 7% in January march with out a clock boost but AMD loves to add an additional 100 to 300mhz per iteration we are going to see more performance on some skus.
Doubt it. And Alderlake at low settings and low resolutions also has an overall 15% lead over AMD's best 5000-series sku and in some games it leads by a massive 30-35%. I am pretty sure that in their numbers AMD is using low settings that exacerbate the uplift. You won't see much uplift in more normal settings in modern titles which are primarily CPU bound anyway. In any case at best AMD will restore parity or claim a 1-2% lead. And regardless, 3d V cache will do nothing for productivity performance where AMD is now losing overall.

For me my 3800x has got me by just fine from launch day I will be buying a 3dvcache to top off my x570 system before building new in 2023 with the am5 platform it is AMD's time to have better memory with new platform launch via Intel testing the tech and waters first get the resources built up for them to come swoop the glory lol.
Most AMD's fanboys give credit to AMD and thank AMD for pioneering things that AMD never actually pioneered. At least you recognise that AMD is not really innovating but just comes late to the party after someone else has done all the actual heavy lifting of a new technology. Same with raytracing and DLSS. But as you can see AMD's implementation is inferior anyway.

Big little breaks a lot of video games new and old so I will not bet on them for a long time to drive the gaming market. Roughly 1.5billion PC gamers in the world and growing. AMD is taking it no one can argue it anymore sure this is a great idea by Intel in theory but it is still broken for their so called gaming crown they have over 20 modern games not playable without disabling the eco cores in bios lol.
The fault is on Denuvo not on Intel. And these are going to get fixed soon anyway. Besides these games are so light that can be maxed out with 4 Haswell cores let alone 8 performance Alderlake cores so there is no issue. And you are at least a hypocrite as I am sure your stance was very different when Threadripper had severe gaming performance issues and you had to disable one chiplet and half the cores to not crush. And you had to do the disabling/enabling in BIOS. At least Intel is with a press of a button on the keyboard on the fly. Actually is great that this happened as it forced Intel to make this feature and allow users when they want, to disable e-cores with a keyboard stroke and utilise AVX512 for example.
 

d0x360

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I want to see AMD adopt a big.LITTLE strategy in the future. They have those Jaguar/Bobcat etc cores, it would be nice to see them used across the board for the low/mid end. Having this many cores, it makes a lot of sense to have even 10 or so of them little efficiency cores. Threadripper is aimed at a big core userbase that presumably wants max threads at all times and has the specialty software to leverage it.

I would think that servers would also be a big beneficiary of efficiency cores given the electric-bill sensitivity of many data centers.
I don't think big little is a good idea for servers.. Better power stepping would do the same thing without needing to sacrifice performance on any of the cores.

Big little on desktop also doesn't seem like a good idea. I just don't see the attraction. Saving $20 a year on my electric bill isn't really a concern and I wouldn't be buying high end components if it was. Even at mid range it doesn't seem necessary. A "big" core could run at a lower clock and essentially save as much energy while also able to clock up if needed.

Ryzen is technically ready for big little and was from gen 1. They could easily put "little" cores in a CCX and call it a day... But why?.

Now if we are talking laptops & netbooks it's a different story and makes complete sense. It also would kinda make sense for the low end desktop APU's.

Honestly I think Intel did it just to increase core counts so they didn't look bad compared to Ryzen.

They beat Ryzen... Which is a year old but AMD is releasing the refresh with the 3d vcache which will likely give it the advantage again and with a year old core.

If AMD puts just a little more focus on IPC then Intel would be even further behind. Imagine AMD matching IPC with Intel on every generation going forward... It would do some serious damage to Intel across all sectors. There would be no reason to pick Intel over AMD for any application, big little or not...
 
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d0x360

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Well, we don’t have the dimensions for their new chiplets where these features/extras are included. But even if we did that wouldn’t provide an accurate comparison between Intel's and AMD's approaches as Zen 4 is on 5nm and has a process advantage over Alderlake/Sapphire Rapids on Intel 7. The best is to compare existing parts on equivalent nodes (Intel 7 vs TSMC 7nm). Besides with AMD using 3D V cache that's essentially another silicon die stacked on top of the compute die. It means AMD is using even more silicon (x2 the area).

Doubt it. And Alderlake at low settings and low resolutions also has an overall 15% lead over AMD's best 5000-series sku and in some games it leads by a massive 30-35%. I am pretty sure that in their numbers AMD is using low settings that exacerbate the uplift. You won't see much uplift in more normal settings in modern titles which are primarily CPU bound anyway. In any case at best AMD will restore parity or claim a 1-2% lead. And regardless, 3d V cache will do nothing for productivity performance where AMD is now losing overall.

Most AMD's fanboys give credit to AMD and thank AMD for pioneering things that AMD never actually pioneered. At least you recognise that AMD is not really innovating but just comes late to the party after someone else has done all the actual heavy lifting of a new technology. Same with raytracing and DLSS. But as you can see AMD's implementation is inferior anyway.

The fault is on Denuvo not on Intel. And these are going to get fixed soon anyway. Besides these games are so light that can be maxed out with 4 Haswell cores let alone 8 performance Alderlake cores so there is no issue. And you are at least a hypocrite as I am sure your stance was very different when Threadripper had severe gaming performance issues and you had to disable one chiplet and half the cores to not crush. And you had to do the disabling/enabling in BIOS. At least Intel is with a press of a button on the keyboard on the fly. Actually is great that this happened as it forced Intel to make this feature and allow users when they want, to disable e-cores with a keyboard stroke and utilise AVX512 for example.
There is so much wrong with your post but I don't have time to address it right now but I'll be back.

Before I go i love how anyone who says something positive about AMD is a fanboy and that AMD hasn't been innovative.

Also comparing alder lake against a year old Ryzen isn't exactly a fair comparison lol. Why was Intel stuck on 12nm for like a decade? Why did Intel change from nm to their new naming scheme? Oh because they are still being..ok.got it.

Adding 3d vcache to a year old architecture is going to put amd back on top lol....that's genuinely sad. Also it doesn't double the silicon or "area" used. It's stacked cache. Think HBM.

Ok gg, I'll try to remember to come back because...damn
 
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I don't think big little is a good idea for servers.. Better power stepping would do the same thing without needing to sacrifice performance on any of the cores.

Big little on desktop also doesn't seem like a good idea. I just don't see the attraction. Saving $20 a year on my electric bill isn't really a concern and I wouldn't be buying high end components if it was. Even at mid range it doesn't seem necessary. A "big" core could run at a lower clock and essentially save as much energy while also able to clock up if needed.

Ryzen is technically ready for big little and was from gen 1. They could easily put "little" cores in a CCX and call it a day... But why?.

Now if we are talking laptops & netbooks it's a different story and makes complete sense. It also would kinda make sense for the low end desktop APU's.

Honestly I think Intel did it just to increase core counts so they didn't look bad compared to Ryzen.

They beat Ryzen... Which is a year old but AMD is releasing the refresh with the 3d vcache which will likely give it the advantage again and with a year old core.

If AMD puts just a little more focus on IPC then Intel would be even further behind. Imagine AMD matching IPC with Intel on every generation going forward... It would do some serious damage to Intel across all sectors. There would be no reason to pick Intel over AMD for any application, big little or not...
Big.little is just the way of the future, it doesn't matter if none of us wants it or can use it, intel's whole stack of skus mobile, desktop, server is going to switch over to it, it's the only way to get enough compute into a small enough space to be able to make them at the crazy amount of volume needed to supply the whole world.
It uses less resources and is cheaper to make and cheaper for the customer.
Also, at least for now, there will be several skus without e-cores so people can choose what they want.
Also comparing alder lake against a year old Ryzen isn't exactly a fair comparison lol. Why was Intel stuck on 12nm for like a decade? Why did Intel change from nm to their new naming scheme? Oh because they are still being..ok.got it.
Why did AMD not bring anything out at the same time as alder so that we wouldn't compare against a year old ryzen? Oh because they don't even have fabs and are forced to wait in line until tsmc can give them some wafers.
Adding 3d vcache to a year old architecture is going to put amd back on top lol....that's genuinely sad. Also it doesn't double the silicon or "area" used. It's stacked cache. Think HBM.
Yeah on top of the most waiting time until you can get them, how many do you think they will be able to make.
Yeah because it's stacked you don't need any wafer to produce it, it just magically appears stacked above your main cores.
 
May 21, 2021
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I want to see AMD adopt a big.LITTLE strategy in the future. They have those Jaguar/Bobcat etc cores, it would be nice to see them used across the board for the low/mid end. Having this many cores, it makes a lot of sense to have even 10 or so of them little efficiency cores. Threadripper is aimed at a big core userbase that presumably wants max threads at all times and has the specialty software to leverage it.

I would think that servers would also be a big beneficiary of efficiency cores given the electric-bill sensitivity of many data centers.
I believe AMD is planning a big.little architecture. If my sources are correct (grain of salt) then the bergamo zen4c cores will be built in 16 core CCX’s. So theoretically with AMD’s chiplet approach, they could have a 2 CCX cpu with one chiplet being an 8 core zen4 and the other being the 16 core zen 4c. Based on my sources the zen4c and zen 4 chiplet are the same size but zen4c packing 16 cores in the same area so technically zen4c cores count as little cores but unlike intel they still retain SMT
 

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