An early look at Phenom dual / tri core performance

Page 6 - Seeking answers? Join the Tom's Hardware community: where nearly two million members share solutions and discuss the latest tech.
Toggle sidebar Toggle sidebar

Yes that one thing about both company's is their next CPU is always better than the last. They are just beginning to experiment with hafnium on metal so it could well be a massive break though for industry. This stuff is used to line the walls in the generation of nuclear power so tough stuff could be an under statement.
 

lol Just think how high a small design like that could be clocked. Its only about 1/1000 the transistor count of Penryn. Think if OCed a thousand times.
 


How many pins did the 486 have? I'm sure if we find a couple of wiring diagrams and enough wires with crocodile clips we could get one running on socket 775 ... it's backwards compatible right? =p

Oh, and i just looked, my original 386 was an AMD :lol:
 

Phase change all the way. I think AMD had the 486 to 75 or 100MHz. I remember the AMD higher clocked version came out right after I got my P60 and I was so mad because my P60 lost.
 
Heh - i skipped 486's and went from 386sx33 to a P133, so i didn't have that dilemma :) From there i went back to AMD for a time ... K6 233, K6-2 500, Athlon 1333, 1600+, 2000+, 2800+, 3700+ & 2800+ (in a shuttle for LANs) and then finally went to a e6600 in a nice shiny G5 shuttle in Feb this year.

Then i sold that because it held magical extra value since it was a shuttle, and built my current 6000+ etc into a silverstone sugo sg01-e case i picked up cheap from EBay.

I still have my pair of voodoo2's though.
 
My first PC was a 486 DX2/66. Never overclocked it, I was too young and a n00b. 😛

After that I went to a Cele 300A @ 464 (which rocked, still my favourite CPU of all time), then on the same 440BX mobo upgraded to a Cele 900 @ 1116, damn unlocked PCI bus meant I couldn't overclock any higher.

Then came an AXP 1700+ @ 2.1GHz, later upgrading to an XP-M @ 2.6GHz and P4 2.6C @ 3.3GHz, later upgrading to a P4 2.8C M0 @ 3.8GHz.

The XP-M and P4-C served me well for 3 years until I finally upgraded to my current rig, which is E4400 based. For a change instead of max overclock, I run it at 2.5GHz undervolted to 1.1V, it runs so cool it could probably be passively cooled. Hey, it's summer in Australia and I don't need a freaking 3.5GHz 100W CPU heating up the place... 😛

I'm currently waiting for the 45nm quads to hit before upgrading, although the Q6600 is tempting!
 
Q6600 is indeed tempting, and I can't blame you for underclocking your CPU. If my motherboard wasn't as poor as it is (i'm finding mATX to be very limiting in terms of decent motherboards - and i chose the wrong one 🙁 ) I'd try the same ... my 6000+ runs a little on the hot side.

But then again, when i do upgrade i have an insane plan for modding the case ... get rid of the 2 fans above the expansion slots and install a 1u 480w power supply there, then where the power supply goes now, after squaring off the PSU hole at the back and covered in mesh etc, I've figured there's *just* enough space to fit the thermaltake 120 ultra extreme heatsink with a silent 120mm fan - more than enough to keep whatever i upgrade to cool =)
 
P.S. So the G0 revision couldn't be smaller and OC the same as the B3? LOL While revisions dont bring down the die size it would allow for the smaller size with about the same heat. Why must I explain this to you? Its all tied together. You should know the lower the heat the smaller the size can be or higher the clock.
Click to expand...

Elbert, where did you get the idea that a company can't decrease the die size of a processor on a new revision. Intel has done this in the past and most likely will do it again. They usually do a slightly larger die for a new processor or process to ensure they can get good yields. At some later point they do a die reduction. Might only be 5% or so but That all helps to get additional die out of the wafer and provides improvements for a larger number of high bin parts.
 


Mmmmm, first link is an announcement for Bulk CMOS process. Right now AMD is using SOI. If they do switch to this processor they through away their Bulk leakage advantage of using SOI. Not saying they won't but no mention of any Hi-K or Metal Gates with this either. The process also looks to be aimed at Digital Cameras and handsets. I will go on record that I don't think AMD is going to use this process to get to 45nm.

Your, second link has bit more information that includes Hi-K and Metal gates but if I remember from past discussions the consensus was that IBM was doing a me too announcement. I also remember reading somewhere that AMD was not planning to come out with Hi-K and metal gates for their initial 45nm process introduction. This of course might all change by the time they launch a 45nm based product but again I will go on record here and say they won't come out with a combined 45nm process with Hi-K and metal gates until sometime in 2009.

Your third link provides confirmation that AMD is not going to launch 45nm with Hi-K or Metal gates. Just improved low K for the process bulk capacitance and the use of immersion lithography. I believe Intel plans to do that at the 32nm node which to point out they have already shown wafer samples of. So Intel has shown 32nm SDRAM wafers. AMD has also shown a 45nm Wafer in a Youtube video I recently looked at.

So, from my calculations AMD is at least 1 to possibly 1 1/2 process generations behind Intel. If we include Hi-K and Metal Gates I would say they are 2 process generations behind Intel.
 


That is not what JKFlipFlop98 says. He works for Intel so I tend to trust what he says. Also, I have not found him wrong yet in what he has contributed to the forums.

He said "Nehalem is a Monster" not to mention that at IDF Intel stated that Nehalem will have a higher performance gain than the Neturst to Conroe gain.
 


They don't use Hafnium to line walls of commercial reactors. They would use Boron-10. A much better absorber of Neutrons. They would use the Hafnium for their control rods. Hafnium barely qualifies as a poison/good neutron absorber.
 

LOL that was the point I was making. Think you need to read back a bit or atleast understand what your quoting. Even understanding what you bolded here is more or less what your stating. Where did you get the ideal that I thought a company can't decrease the die size? I'm stating that a company can reduce die size if revisions lower heat.
 

Again read back as to what your replying to because the reply was to IBM hasn't even done a single 45nm. If you read the rest you will see that IBM is going to be producing 45nm CPU's for AMD as the agreement. This being the first quarter of 2008 so AMD getting their fabs ready will stop the low end and should only impact the high end. IBM made this agreement to make sure their supply of high end CISC base CPU's wouldn't be affected.
 

A little to late as its already been said and if its not faster than they would suck so what the point. I find that both AMD and Intel over estimate their new cores about 4 out of 5 times so proof is the only thing worth listening too.
 

Good catch however their is research into using it on the reactor walls in combination with boron. Did you get the point is the good question? IE IBM or for that matter AMD is not behind Intel in R&D. From what I have see IBM is ahead with proven ideals like V-groove and two-photon 3d lithography.
 



I don't see the point of using hafnium as any type of primary shielding in a Reactor. With or without Boron. Hafnium is more expensive and not as good at absorbing Neutrons. Boron about 100 times less expensive and about and about 100 times better at absorbing Neutrons.

It has great corrosion resistance so using it as a cladding in the reactor vessel would make sense. If I was designing reactor shielding I sure would not be looking at it as my primary shielding at all.

Mmmmm, and is any of the V-groove or two-photon 3d lithography ready for production??? I don't see their 45nm lithography as being ready either for production. I will just have to disagree with you on IBM's lithography technology being ahead of Intel's.
 


I wouldn't say using Hafnium as gate dielectric is not a "proven" ideals. If you read those Penryn previews, Hafnium gate dielectric really reduced the power consumption by a significant margin.

Now, I'm not doubting IBM's R&D, but in terms of process node, they're behind Intel by a noticeable margin. IBM has yet to demonstrate 45nm functional logic chips, while Intel is already manufacturing them in FAB12, and soon 2 others.

On the side note, IBM is a lot better at researching cutting-edge technology, but not so at implementing them. So while they develop very cutting-edge technology, there is a chance we won't see them on the market.
 

It all depends on what you mean ready for production? Test samples have proven them both to work. I will just have to disagree with you on IBM's lithography technology being behind Intel's.

On the Hafnium just think about make more energy before the boron absorbs. Refer to my next post for a reply on your last comment.
 

True IBM has been doing R&D on Hafnium since 2001 so its not new to any of these company's.
Physical and electrical characterization of Hafnium oxide and Hafnium silicate sputtered films, A. Callegari (IBM Corp, Thomas J Watson Res Ctr, POB 218, Yorktown Hts, NY 10598 USA) et al., Journal of Applied Physics, 90, No. 12, 6466-6475 (2001).
Click to expand...
http://www.research.ibm.com/journal/rd/recentpubs/recentpub_20020114.html

45nm is just the next processing phase however IBM back 2 years ago made plans to jump to 32nm. I guess you cant be the first to all things but this may be the reason IBM hasn't moved to 45nm yet. Its just a leap frog game no matter which is at what point currently. Now AMD on the other hand has always been behind in processing unless you count IBM's stressing technology which for a while did give them the upper hand.
http://www.theregister.co.uk/2006/01/12/ibm_sony_toshiba_32nm_cell/

Now if we count the fact IBM is already making 3D chips though stacking the ideal of who is at what nm is worthless. At 65nm 2 layers has the same design space as 45nm and beyond 45nm would allow for shorter connections. This was back in march so its in a way better than 45nm as 4 layers is an equal to 32nm design space. I would in no way call IBM behind anyone in anything to do with technology.
IBM is already running chips using the through-silicon via technology
Click to expand...
http://www.technologynewsdaily.com/node/6623
 
Are you saying Intel is claiming Nehalem will beat a C2D by 40%? If so I could see that as even the C2Q can do that. Are you saying Intel is claiming the 8 core Nehalem will beat the C2Q by 40%? Again I could see that. I am left thinking is Intel just trying to confuse us? The last advantage AMD will have is HT3 and could bring up a possible bottleneck for Nehalem. I just wonder if Intel is going to address the 4X4 threat which may surface around January and again on Nehalems launch.
Click to expand...
It would be very silly for Intel to make performance improvement claims merely based on increased number of cores. They're not like AMD when talking about a drop-in replacement, where socket-based improvement might very well be 80% (when they get their clocks right).

When Core 2 Duo came out, there were already Pentium D's, and the Merom vs. Prescott comparison was dramatic. The only caveat that I can see with the Nehalem vs. Yorkfield comparison (both 4-core) is that some of the performance impact may be in the server environment, where the IMC and interconnects really help. Whether desktop improvement is even close to 40% let alone 80% is up in the air until they clarify; they won't have lied if it falls short, as long as we see their claimed improvement in server loads.

Judging by Kentsfield to Yorkfield is wrong. That's basically a die shrink. The 5-10% IPC improvements were the minor performance changes made, while the process and other tweaks provided 20-25% clock headroom and better power consumption at a given clock. Nehalem is a complete redesign, not even a die shrink (same 45nm).
 

Not really as all things the C2Q is faster even with a less performance per core. A good example is the Q6600 which is better over all than the E6850. We are in the multi core age were 16 cores can out perform 8 cores and claim victory. Did Intel claim performance improvements with kentsfield?

Intel will be able to offer quad-core in volume offering 80W thermal envelope. With that configuration they promise us 50% increase in performance.
Click to expand...
http://www.xbitlabs.com/articles/cpu/display/kentsfield-preview_2.html

Correct me if im wrong but didn't Intel hurt their dual core sales when they compared the quad to their dual to stop the 4X4 talk.

I do agree with your second paragraph as not all can be seen by the public. Judging by kentsfield to Yorkfield however isn't wrong as not only is it a die shrink but new materials. Hafnium is possible the most important discover for CPU's this decade. It greatly reduces leakage and if used correctly could safely achieve up to a 10% increase in your max voltage. That more or less puts the 45nm's top voltage equal to the 65nm. I think Intel could be releasing stock Yorkfield upward of 3.6~4GHz in a short time. Now if Nehalem is judged against a 4GHz Yorkfield that leap becomes small and that should be were Yorkfield is by this time next year.

Whats the difference in the top clocks of both kentsfield and Yorkfield. I think its like 600MHz which most would see as Intel just not being pushed to release a higher clocked Yorkfield.
 
Not really as all things the C2Q is faster even with a less performance per core. A good example is the Q6600 which is better over all than the E6850. We are in the multi core age were 16 cores can out perform 8 cores and claim victory. Did Intel claim performance improvements with kentsfield?
Click to expand...
There is a sharp distinction between comparing products with clearly different core counts and comparing two generations of cores where the core count isn't explicitly changing.

When they compared Kentsfield QX6700 (2.67GHz) to Conroe X6800 (2.93GHz), it was up to 80% faster as anyone could calculate by multiplying frequency by number of cores for perfect scaling.

However, when they're claiming improvement from Netburst to Conroe, or from Penryn to Nehalem, they can't base their performance claims simply on a change of core count - that would be dishonest. Pentium D was two cores, and Conroe is two cores. Similarly, Yorkfield is four cores, and Nehalem initially will have four cores. Whether they may introduce eight or however many cores later does not matter. If there's no improvement and Yorkfield ends up keeping up with native 4-core Nehalem, then Intel will have lied about a performance improvement similar to Netburst -> Conroe.

Intel hasn't lied to us very often. Nowhere near like AMD has done to us recently.
 

Ok but are they basing it on a 3GHz Penryn which we all know its able to go much higher? Going from netburst to conroe was in that small time frame a big improvement. What Yorkfield is now and what Yorkfield will be a year into the future can produce some big differences. Will the same claim apply a year from now is probably not true.

See many forget that when AMD first made their claims about phenom as it was the time of the FX62. Now not even counting phenom the FX62 is at best 3rd fastest to the X2's. Right now AMD could say Bulldozer would be a bigger jump than netburst to conroe because phenom is much slower now than it will be a year and a half from now.

For the most part netburst was a very old design and the jump we seen from conroe was impressive to say the least. We have not seen that kind of jump before and will most like never see it again. The core race would pretty much make it impossible for any single core to ever get that kind of performance boost. This is of course unless we are comparing current tech to tech at least a year off. When Nehalem launch it should beat Yorkfield but not nearly as much as it would beat todays Yorkfield. Yes Intel and AMD do this kind of back handed PR all the time but lets see if the same apply's come Nehalem's launch.
 
As i see it - while the performance claims may seem dishonest if based on inappropriate comparisons like elbert suggests, they're not telling any lies as it is actually quite cleverly worded so that down the road they can put multiple different spins on it.

Considering how far off nehalem is, this is basically the most honest comment concerning performance you'll get to the media from an Intel spokesman - no matter if they end up having to tweak the meaning of it 9 months from now.
 
You must log in or register to reply here.

TRENDING THREADS

Latest posts

Moderators online

Share this page

COMPANY
RESOURCES
FOLLOW
Top Bottom