A similar concept was also worked on before, in 2022, although not same, but it was described as Bumpless Build Cube (BBCube) using Wafer-on-Wafer (WOW) and Chip-on-Wafer (COW) for Tera-Scale Three-Dimensional Integration (3DI).
This was a quite interesting research paper though. Worth giving a read. Bumpless interconnect tech increased the number of TSVs per chip due to the finer TSV pitch and the lower impedance of bumpless TSV interconnects.
So when wafers with micrometer thickness were stacked, the total thickness was reduced, and the transistor capacity increased in proportion to the number of wafers.
Increasing the TSV interconnects density enabled terabyte-level bandwidth without sacrificing energy efficiency
Bumpless Build Cube (BBCube) using Wafer-on-Wafer (WOW) and Chip-on-Wafer (COW) for Tera-Scale Three-Dimensional Integration (3DI) is discussed. Bumpless interconnects between wafers and between chips and wafers are a second-generation alternative to the use of micro-bumps for WOW and COW...
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