[quotemsg=21000758,0,1857486][quotemsg=21000733,0,8708][quotemsg=21000607,0,1857486]A correction needed:
"the remaining six HSIO serve the three USB 3.1 Gen2 ports"
There are only 2 USB 3.1 Gen2 ports (one type A and one type C at the back). Only one HSIO is used for the third USB 3.1 Gen1 port that is available as a header for type C. I believe the remaining 1 HSIO lane would be allocated to the GbE port. I'm not sure if the CNVi uses a lane.[/quotemsg]Well what do you know, I must have temporarily mistaken it for an honest USB 3.1 Gen2 front-panel port rather than a sham version. As for the Ethernet, it's an i219V so it has an independent path and...oh crap, I checked the original table against the version you're seeing, they REMOVED i219V and replaced it with the word "Intel", as if that was useful. Thanks for asking a question I'd already answered, otherwise I wouldn't have looked for the error.
See if this makes more sense

"The first PCIe x16 slot is fed by the CPU’s PCIe controller and doesn’t count toward the chipset’s 30-lane limit. The second x16-length slot has four chipset lanes, the four x1 slots have fixed pathways, and only one of the six SATA ports is a potential share (in the unlikely event that it gets lost to a SATA-based M.2 card). The upper and lower M.2 drive slots consume four and two lanes (respectively), the two rear-panel USB 3.0 ports takes up two more HSIO resources, the front-panel USB 3.0 header consumes only one HSIO through a USB hub, the USB 3.1 front-panel header consumes one HSIO since it's only connected to a Gen1 interface, and our math says that the four of the remaining six HSIO serve rear-panel USB 3.1 Gen2 ports. The two remaining HSIO pathways would seam to go to an unused M.2 Key-E interface, since the CNVi connector is cross-compatible with Key-E devices. All that said, for a budget-minded PC, the second (two-path) M.2 storage slot may likely go unused, rendering its lane count moot. "
[/quotemsg]
There seems to be a confusion again with the H370!
What I meant to say was:
2 lanes for 2 USB 3.1 Gen1 ports at the back
2 lanes for 2 USB 3.1 Gen1 ports header on board
1 lane for 1 USB 3.1 Gen1 Type-C header on board
4 lanes for 2 USB 3.1 Gen2 ports at the back (one type-A and one type-C)
And the remaining PCIe (4 + 1 + 1 + 1 + 1) + SATA (6) + M.2 (4 + 2)
This brings the count to 29 lanes. That would leave 1 port unaccounted for, unless it's used for either the GbE or the CNVi. Or it may even be shared? I'm not sure which one would account for the remaining 1.
I hope you've now understood my concern. I bought the H370 Aorus WiFi just a few days ago. Wonderful board though.[/quotemsg]
Please re-read what I quoted from the updated article:
4 lanes for the third x16 slot
4 lanes for the three x1 slots
6 lanes for SATA
4 lanes for the main M.2 storage slot
2 lanes for the second M.2 storage slot
2 lanes for the rear USB 3.0
1 lane for the front (dual port) USB 3.0 because it's on a hub
1 lane for the front (single port) USB 3.1 because its Gen1
4 lanes for the two REAR USB 3.1 Gen2 ports (Type A, C)
2 lanes for M.2 Key-E Wi-Fi card compatibility, even though they're not used.
4+4+6+4+2+2+1+1+4+2=30
The CNVi module doesn't require HSIO, but the slot itself is M.2 Key-E compatible so it still needs two PCIe pathways.
I hope I addressed your concern two posts ago
