News China’s push for chip independence continues with its first RISC-V server CPU

[Admin]

China accelerates its shift from x86 and ARM with RiVAI’s high-performance RISC-V chip.

China’s push for chip independence continues with its first RISC-V server CPU : Read more

 

[Findecanor]

Myself, I would acquire independent information from multiple sources before reposting something posted on April 1st.

 

[bit_user]

RISC-V is an open-source instruction set that allows Chinese firms to design and manufacture processors without external restrictions.

It's an open standard.

The main part of it is indeed the ISA, but it also includes a system architecture. Operating systems are the main thing that care about the system architecture. Having a consistent system architecture makes it easy for an operating system to support a large number of different RISC-V implementations. Most of the details of a system's architecture are hidden from application programs by an operating system's API, or else it would be much harder to port them from one to the next.

 

[bit_user]

Myself, I would acquire independent information from multiple sources before reposting something posted on April 1st.

Is April Fools Day even a thing, in China? Even if it is, this doesn't seem like something they'd joke about.

 

[abufrejoval]

I'd just wish they'd also do an entry level server part with the same architecture, e.g. for an IoT box or development machine at a NUC price.

There may now be something nicely fast in terms of cores, while the rest of the RISC-V pack seems to be really anemic.

I might actually own quite a few RISC-V chips already as part of WD HDD controllers, but those are no fun.

 

[abufrejoval]

Is April Fools Day even a thing, in China? Even if it is, this doesn't seem like something they'd joke about.

Of course, the best jokes are the ones which are easy to believe at first.

But yeah, RISC-V isn't a joke for China, even if they might still want to keep some truly domestic architectures around in case the US still manages to hijack RISC-V somehow.

 

[Rob1C]

The effort (existence) is true:
https://www.xrvm.com/product/xuantie/R908

Releases · riscv-non-isa/server-soc

The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate releases of the specification on milestones. Further downstr...

github.com

These are basically 8 core processors that lag where ARM was a long time ago.