CNEX Labs Looks Like Missing 3D XPoint Puzzle Piece

[Guest]

We recently took an exclusive look at Micron's 3D XPoint QuantX prototype and found out some juicy details. In the interim we were able to track down the purported SSD controller vendor and get the full low-down on a high-flying new architecture.

CNEX Labs Looks Like Missing 3D XPoint Puzzle Piece : Read more

 

[manleysteele]

A second well researched, well written review of their product in as many days. Take that, Micron and CNET.

 

[jasonelmore]

excellent article, this even puts anandtech to shame

 

[KaiserPhantasma]

well written but how fast will it be released commercially? we see all these "great technologies" yet we can't seem to buy them (on the consumer not enterprise level)

 

[Growlzler]

Timely and well written article. Greatly appreciated on my part.

 

[wgt999]

Paul, thanks for the sleuthing and the analysis. Most interesting. Micron seems very serious about delivering a breakthrough product. Can't wait to see it finishing and in production! Now, can they make enough XPoint memory to come anywhere close to meeting market demand?

 

[PaulAlcorn]

Paul, thanks for the sleuthing and the analysis. Most interesting. Micron seems very serious about delivering a breakthrough product. Can't wait to see it finishing and in production! Now, can they make enough XPoint memory to come anywhere close to meeting market demand?

That is the multi-billion dollar question. Also, pressure from competitors that utilize proven, and cheap, technology are going to create a significant barrier. See here for Samsung's dual-prong strategy.

http://www.tomshardware.com/news/samsung-3d-xpoint-z-nand-z-ssd,32462.html

 

[kinney]

Paul, thanks for the sleuthing and the analysis. Most interesting. Micron seems very serious about delivering a breakthrough product. Can't wait to see it finishing and in production! Now, can they make enough XPoint memory to come anywhere close to meeting market demand?

That is the multi-billion dollar question. Also, pressure from competitors that utilize proven, and cheap, technology are going to create a significant barrier. See here for Samsung's dual-prong strategy.

http://www.tomshardware.com/news/samsung-3d-xpoint-z-nand-z-ssd,32462.html

Yeah, could easily end up as another Rambus redux with 3DXpoint.

 

[jasonf2]

Correct me if I am wrong but this technology seems to be alot like what is going on with directx12 on the GPU side where software developers are able to "get closer to the metal". It seems to me though that to be able to fully utilize this there would have to be a pretty good amount of rework on the OS side. Is the application specifically for supercomputer class big data workloads where this is pretty common or how are they planning on handling this? It seems to me that this is going to take a pretty specialized programmer working in system optimization to a specific controller to really take advantage. Or am I missing something?

 

[wgt999]

Correct me if I am wrong but this technology seems to be alot like what is going on with directx12 on the GPU side where software developers are able to "get closer to the metal". It seems to me though that to be able to fully utilize this there would have to be a pretty good amount of rework on the OS side. Is the application specifically for supercomputer class big data workloads where this is pretty common or how are they planning on handling this? It seems to me that this is going to take a pretty specialized programmer working in system optimization to a specific controller to really take advantage. Or am I missing something?

You're right. SCM - also called PM (persistent memory), basically demands a new computing and programming model. If you want a great introduction the work that needs to get done take a look at the SNIA spec on the Persistent Memory Programming Model. http://bit.ly/2aWmDSH Microsoft and Linux are well into implementing this but it's still going to take many years before it is fully implemented and application software takes full advantage of it.

 

[PaulAlcorn]

Correct me if I am wrong but this technology seems to be alot like what is going on with directx12 on the GPU side where software developers are able to "get closer to the metal". It seems to me though that to be able to fully utilize this there would have to be a pretty good amount of rework on the OS side. Is the application specifically for supercomputer class big data workloads where this is pretty common or how are they planning on handling this? It seems to me that this is going to take a pretty specialized programmer working in system optimization to a specific controller to really take advantage. Or am I missing something?

You're right. SCM - also called PM (persistent memory), basically demands a new computing and programming model. If you want a great introduction the work that needs to get done take a look at the SNIA spec on the Persistent Memory Programming Model. http://bit.ly/2aWmDSH Microsoft and Linux are well into implementing this but it's still going to take many years before it is fully implemented and application software takes full advantage of it.

It will surely take a while to filter down to broader use-cases, but some are very interested in using it. I think that the core CNEX value prop is that it allows the vendors plenty of room to navigate by either using plug-and-play NVMe or the Open-Channel/LightNVM approach. It will surely be interesting to see how much penetration the more advanced architectures gain into the data center.
That said, there are likely far more data center operators that are interested in proven and mature solutions.

 

[manleysteele]

Are we overthinking this? Once the BIOS thinks it's storage and IO.sys thinks it's storage, how much more do we need to do? If Disk Manager will assign it a drive letter and run it as that drive, everything else should fall into place. Treating it as a 5th or 6th level memory cache is more involved, but not so complicated as to be untenable. That's what drivers are supposed to do. Even an app that blurs the lines, in a usage paradigm, should not be that hard for the MB manufacturers to figure out and implement. Once a standard is set, it's just 1's and 0's.

 

[wgt999]

Are we overthinking this? Once the BIOS thinks it's storage and IO.sys thinks it's storage, how much more do we need to do? If Disk Manager will assign it a drive letter and run it as that drive, everything else should fall into place. Treating it as a 5th or 6th level memory cache is more involved, but not so complicated as to be untenable. That's what drivers are supposed to do. Even an app that blurs the lines, in a usage paradigm, should not be that hard for the MB manufacturers to figure out and implement. Once a standard is set, it's just 1's and 0's.

Unfortunately it's not that simple. Persistent memory needs to be ACID compliant, and new programming semantics are required to write good code that ensures that the data in PM is handled with all the protections that block mode programming has had for some time now. Just because you can read it with a "load" command doesn't mean you can "store" it as you do to DRAM. I encourage you to take a quick look at the SNIA PM programming model site (link above). The good news is that the work is well underway by both Linux and MS.

 

[manleysteele]

Are we overthinking this? Once the BIOS thinks it's storage and IO.sys thinks it's storage, how much more do we need to do? If Disk Manager will assign it a drive letter and run it as that drive, everything else should fall into place. Treating it as a 5th or 6th level memory cache is more involved, but not so complicated as to be untenable. That's what drivers are supposed to do. Even an app that blurs the lines, in a usage paradigm, should not be that hard for the MB manufacturers to figure out and implement. Once a standard is set, it's just 1's and 0's.

Unfortunately it's not that simple. Persistent memory needs to be ACID compliant, and new programming semantics are required to write good code that ensures that the data in PM is handled with all the protections that block mode programming has had for some time now. Just because you can read it with a "load" command doesn't mean you can "store" it as you do to DRAM. I encourage you to take a quick look at the SNIA PM programming model site (link above). The good news is that the work is well underway by both Linux and MS.

ROFL. The document you referenced goes into excruciating detail for 85 pages on how to accomplish exactly the usage cases I outlined. What it doesn't do is break any new ground or describe any major shift in requirements or capabilities that don't already exist. Make no mistakes. Either the device can be treated as a drive or memory or even an SSC, or it is DOA in the consumer space. Users don't want to have to do anything, but assign it a drive letter or, as memory, plug it in and automatically load a driver. Some power users may be willing to manage an SSC, but, frankly, if I have to do a lot of management, why do I want it? The entire point of memory as storage it to treat it as storage. The entire point of persistent memory as memory is to treat it as memory. The case for an SSC is to set it and forget it.

 

[wgt999]

Are we overthinking this? Once the BIOS thinks it's storage and IO.sys thinks it's storage, how much more do we need to do? If Disk Manager will assign it a drive letter and run it as that drive, everything else should fall into place. Treating it as a 5th or 6th level memory cache is more involved, but not so complicated as to be untenable. That's what drivers are supposed to do. Even an app that blurs the lines, in a usage paradigm, should not be that hard for the MB manufacturers to figure out and implement. Once a standard is set, it's just 1's and 0's.

Unfortunately it's not that simple. Persistent memory needs to be ACID compliant, and new programming semantics are required to write good code that ensures that the data in PM is handled with all the protections that block mode programming has had for some time now. Just because you can read it with a "load" command doesn't mean you can "store" it as you do to DRAM. I encourage you to take a quick look at the SNIA PM programming model site (link above). The good news is that the work is well underway by both Linux and MS.

ROFL. The document you referenced goes into excruciating detail for 85 pages on how to accomplish exactly the usage cases I outlined. What it doesn't do is break any new ground or describe any major shift in requirements or capabilities that don't already exist. Make no mistakes. Either the device can be treated as a drive or memory or even an SSC, or it is DOA in the consumer space. Users don't want to have to do anything, but assign it a drive letter or, as memory, plug it in and automatically load a driver. Some power users may be willing to manage an SSC, but, frankly, if I have to do a lot of management, why do I want it? The entire point of memory as storage it to treat it as storage. The entire point of persistent memory as memory is to treat it as memory. The case for an SSC is to set it and forget it.

I guess I misunderstood your question. From a user perspective nothing will change. From a programming and system perspective, much will change.

 

[jasonf2]

Manleysteele,
Advantages of this controller are going to be on a very limited basis. One example I can come up with is a database system that can optimize itself in such a way that latency issues are reduced significantly by controlling system maintenance and RAID operations to offload times and/or cycles. This isn't going to make mine-craft run any faster. In order for this to have any real world effect the system is going to have to be running at near capacity, something that the average PC doesn't do very often. This is really going to be in a data-center / supercomputer application level where computation resources are pretty well maxed. This isn't about C: drives, but think about it more along the line of being able to programmatically optimize drive operation for your specific program to increase performance.

 

[DavidC1]

"Yeah, could easily end up as another Rambus redux with 3DXpoint."

Purley, the next generation Xeon EP/EX, is going to support 3DXpoint(aka Optane) on a DIMM form factor.

That single-handedly proves that not only its coming in the near-future, but its proven. They even have a Top 500-scale system coming that's going to use future Xeon Phi and Xpoint based memory.

In contrast, Rambus did not bring enough performance to fundamentally change things. At same bandwidth, DDR was faster than RDRAM.

The description of Samsung Z-NAND does not sound more than fancy maybe-SLC NAND with a good controller either.

The Intel X25-M drive was the first SSD that brought reliability and performance of SLC drives at a price only MLC can match. The issue is Intel wasn't able to keep the pace despite them being basically kickstarting the NAND flash SSD market. Hopefully with 3DXPoint they can maintain the lead not just have it on the first few years.