News Corsair: DDR5 Modules Will Require Better Cooling

[Admin]

On-board VRM and PMIC tend to heat, might need advanced cooling.

Corsair: DDR5 Modules Will Require Better Cooling : Read more

 

[sizzling]

Could that mean they would be best with more spacing between them on the motherboard?

 

[CerianK]

Could that mean they would be best with more spacing between them on the motherboard?

Or hire Splave to keep your rig cool while you are using it.

 

[torbjorn.lindgren]

Could that mean they would be best with more spacing between them on the motherboard?

You want the slots on the same channel to be as close as possible due to signal integrity reasons, this applies for all the different memory routing options. It's the same reason why motherboards with just one memory slot per channel are much better for memory overclocking, just even worse.

So spacing out the DDR5 slots (on the same channel) will help with cooling the RAM when both are populated (2DPC) but will at the same time reduce the speed the memory can run at. With only one slot per channel populated (1DPC) the frequency degradation will be smaller but on the other hand there's very little benefit to cooling in that scenario too.

So I doubt they'll go that route since it would hurt the "sticker" memory frequency that motherboard vendors use for advertisement, the primary number they advertise is 1DPC which would be best with narrow slot spacing, the 2DPC number is listed but I also expect they'll be just fine with pointing a massive and noisy fan on the 2DPC configuration if that's what's necessary to get the best possible frequency for 2DPC.

 

[ezst036]

Isn't it time for QDR? (Quad data rate)

 

[Soul_keeper]

So right out the gate we'll be seeing highly overvolted/overclocked modules as all the manufacturers try to compete with each other. This is kinda a shame, the specs/standards mean little anymore. Everything is factory overclocked and overpriced.

 

[InvalidError]

Anything will require cooling when pushed to ludicrous frequencies at ridiculously high voltages. Normal "everyday DIMMs" on the other hand will likely still achieve lower typical power than similar performance DDR4-4000+ despite all of the extra on-board stuff mainly from having a lower nominal operating voltage and tighter voltage regulation.

Isn't it time for QDR? (Quad data rate)

The only thing QDR does is reduce the amount of power needed for clock distribution. Also, DIMMs have a "strobe" signal (basically a clock) for each 8/9bits word and the other end uses strobe edges to clock data in, can't do that anywhere as easily if those were changed to QDR.

 

[Kamen Rider Blade]

I still think we should follow IBM's path and moved to Serialized Interface for RAM.

IBM's OMI (Open Memory Interface) that is capable of 1 TB/s transfer speeds seems like the right path for the industry to follow.

 

[hotaru251]

if they seriously do make 1.6 the "normal" for DDR5...water cooled memory may actually be reasonable instead of stupid.

 

[hannibal]

Nah, just use those thiny whiling ram cooler fans 😉

 

[Sleepy_Hollowed]

I guess heat sinks for these will be a thing, possibly with a top fan adapter to suck hot air out.

Corsair had something like these for some of their overclocked ram, though it was overkill unless you had a tight case and everything else overclocked too, this will now be needed for those.

Not a terrible thing, but if that fan dies… data corruption would be real fast, so if I were going to buy I would get ECC DDR5, unless operating systems/UEFI can implement temperature monitoring and actions.

 

[torbjorn.lindgren]

Isn't it time for QDR? (Quad data rate)

QDR isn't a very good solution for memory, the next step is to keep transferring on both transitions/edges but encoding multiple bits into each transition as different voltage levels (amplitude) instead, like PAM-3/4/8/16 and up (the number is the number of levels, so PAM-256 would mean 256 states, IE 8 bits per transition).

Note that GDDR6X (RTX 3080+) uses PAM-4 so there's already commercially available (albeit speciality) memory chips that implement this. PAM-4 encodes 2 bits per transition (edge) so GDDR6x gets the same bandwidth as if they had run "QDR" but it's much easier to implement. You could also add even more bits via additional levels but the circuitry quickly gets complicated when add more levels and noise quickly becomes more and more of a concern.