Discussion CPU instruction set explanation thread

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@jnjnilson6, do you have any thoughts to add on this subject? I am curious to know your thoughts as you seem to know a lot about CPUs.
Thank you! Well, as with everything, the basics are the golden terms for future augmentation; in the past I was more deeply interested in CPUs and knew some 'deeper secrets.' However with time those memories have acquired vagueness and are slithering past recognition in a hidden drawer.

One cool thing to note is the math coprocessor for the 386DX which the 386SX lacked. You could however get a 386SX and add an i387 to your motherboard which action retrieves the coprocessor. The coprocessor allowed for additional more complex software to be executed. The 386SX also supported less RAM. The 386DX' math coprocessor provided a huge jump in terms of technology, speed and capability. It was possible to write software on the SX which would emulate DX instructions making it possible to run DX software on an SX chip.

(As far as I know defective DX chips (during production) were made into and sold as SX chips in order to save money and not dump away the chips).
 
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One cool thing to note is the math coprocessor for the 386DX which the 386SX lacked. You could however get a 386SX and add an i387 to your motherboard which action retrieves the coprocessor.
Um, the difference between 386DX and 386SX was the latter halved the memory bus to 16-bit. Neither had an integrated FPU.

It was the i486 where the DX models include a FPU, while the SX models didn't.

I owned both a 386DX with a Cyrix FastMath x387 clone (dad's) and a 386SX (mom's). One of my friends had a 486SX. Funny enough, my programs which used floating point were faster on my 386DX machine, due to its math coprocessor, than on my friend's 486SX.
 
What exactly are ROPs? I hear the spec on GPUs all the time, but I don't know what it stands for or what it does.
Long answer
Simple answer: A ROP (acronyms differ) takes all the other processing done so far on all the graphical objects and makes the final decision as to what colour the pixel at (x, y) needs to be as a result.

It's an important spec because there's no point having a card capable of doing all the rotations and scaling and light and texture and ray tracing and whatnot if it doesn't have enough ROPs to turn all that into a screen's-worth of pixels in time to send out as the next frame.

Interesting. Also, what exactly is tesselation? On the topic of CPUs, I've heard that ARM can't do division, (can't remember if it can't at all, or it's just not very good at it) is this true, or was I misinterpreting what I had heard?
Long answer
Simple answer: A 3D object surface is modelled by connected triangles, known as a mesh. Tessellation is the GPU taking a mesh of large triangles and turning it into a mesh of smaller triangles to improve the smoothness of the surface.

On the topic of CPUs, I've heard that ARM can't do division, (can't remember if it can't at all, or it's just not very good at it) is this true, or was I misinterpreting what I had heard?
Long answer
Simple answer: Some can, some can't.
 
It's an important spec because there's no point having a card capable of doing all the rotations and scaling and light and texture and ray tracing and whatnot if it doesn't have enough ROPs to turn all that into a screen's-worth of pixels in time to send out as the next frame.
It's a little weird to make these a hard-wired unit, though. No? Just consider the ratio of shader cycles to memory bandwidth, in a modern GPU, and it seems like there could be ample shader cycles to do the ROPs' job in software. At least with TMUs, there's texture compression to deal with.

Tessellation is the GPU taking a mesh of large triangles and turning it into a mesh of smaller triangles to improve the smoothness of the surface.
Misleading. Tessellation doesn't use simple triangles, as the input - it uses patch control points! Yes, the patches are either triangular or quadrilateral, but they're not simple triangles. The patches are mathematically-defined smooth surfaces.

Here's a slide deck from Nvidia:

And one from AMD:
 
It's a little weird to make these a hard-wired unit, though. No? Just consider the ratio of shader cycles to memory bandwidth, in a modern GPU, and it seems like there could be ample shader cycles to do the ROPs' job in software. At least with TMUs, there's texture compression to deal with.
That is weird, maybe with future generations it will happen? wouldn't there be a performance penalty or would the sheer number of shader cycles make up for it?
 
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So theoretically, you could run some modern software, right? I know performance might be abysmal, but theoretically, it would work, right?
Well, the last Windows OS the 386DX supported was Windows 95. And it ran quite slowly on it. You could get a Win3.11 (for workgroups) or Win95 system today and write software for the 386DX system with something like Borland C++ and if you were a very good programmer you could overcome any apex and still create great software. Thereafter with a little tweaking and accommodating you could recompile the software in a way in which it would run on modern software like Windows 10 or 11.

The ability of a CPU like the 386DX in the hands of someone who knows what they are doing is endless.
 
Because the 486 gets the job done.

Upgrading the CPU on a device in orbit is entirely unlike upgrading the CPU in the PC on your desk.

Years and years, and many many millions of dollars.
Those CPUs do die out eventually. I wonder if they still get 386 and 486 replacements from Intel (despite the fact that it is proclaimed such CPUs are no longer in production) or acquire such parts in new or pristine condition from other sources which have kept them that way.
 
Those CPUs do die out eventually. I wonder if they still get 386 and 486 replacements from Intel (despite the fact that it is proclaimed such CPUs are no longer in production) or acquire such parts in new or pristine condition from other sources which have kept them that way.
Also, we no longer have the Shuttle.
The last servicing mission was in 2009.
 
So theoretically, you could run some modern software, right? I know performance might be abysmal, but theoretically, it would work, right?
My father is a great programmer. I've always been more on the Hardware side in terms of computing.

Thank you for inquiring and everything. I predict a glamorous future for you in the spheres of computing; you're heading toward the line of knowledge and understanding which passes up our most vivid dreams and genuine aspirations; the anticipation of lingering numerals in the dark and the tempting susception of passionate digital endeavors, all within the mind and curiosity; beauty glistening glossily on the monitor like shifting raindrops on the windowpane in shards and moments of contemplation and stilled serene glory, the culmination to a momentous and exalted day.
 
My father is a great programmer. I've always been more on the Hardware side in terms of computing.

Thank you for inquiring and everything. I predict a glamorous future for you in the spheres of computing; you're heading toward the line of knowledge and understanding which passes up our most vivid dreams and genuine aspirations; the anticipation of lingering numerals in the dark and the tempting susception of passionate digital endeavors, all within the mind and curiosity; beauty glistening glossily on the monitor like shifting raindrops on the windowpane in shards and moments of contemplation and stilled serene glory, the culmination to a momentous and exalted day.
Thanks for the compliment. I’m fascinated by technology.
 
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you're heading toward the line of knowledge and understanding which passes up our most vivid dreams and genuine aspirations; the anticipation of lingering numerals in the dark and the tempting susception of passionate digital endeavors, all within the mind and curiosity; beauty glistening glossily on the monitor like shifting raindrops on the windowpane in shards and moments of contemplation and stilled serene glory, the culmination to a momentous and exalted day.
This passage reminds me a little of the song Twilight, by Electric Light Orchestra (ELO).
I keep trying to remind myself how amazed my teenage self would've been by today's hardware. It's like as if I'm programming supercomputers, every day.

I dunno, though. Today's computers are already so fast that I really have no reason to look forward to tomorrow's. There's just nothing I really want to do with them I couldn't already do yesterday. Realtime raytracing was the last "wouldn't it be cool if..." that I had, and that's already old hat, by now.
 
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It's a little weird to make {ROPs] a hard-wired unit, though...it seems like there could be ample shader cycles to do the ROPs' job in software.
I wouldn't pretend to know for sure, but I'm happy to believe that if NVIDIA and AMD are using hardware ROPs instead of software shaders, it must give better performance.

Somebody here makes the fair argument that ROPs just need to do run a couple of simple arithmetic operations while shaders have plenty else to be getting on with.


Misleading. Tessellation doesn't use simple triangles, as the input - it uses...
Personally, if somebody asks a basic question I tend to start with a basic answer. I don't consider it misleading any more than I'd consider saying "the number is stored at a memory address" misleading because what really happens is a load of high and low electrical voltages are applied to a specific arrangement of NAND gates.

Even AMD choose to use the term "Triangle Patch Mesh" (Slide 9) and NVIDIA "Input Triangles" (Slide 20).
 
I wouldn't pretend to know for sure, but I'm happy to believe that if NVIDIA and AMD are using hardware ROPs instead of software shaders, it must give better performance.

Somebody here makes the fair argument that ROPs just need to do run a couple of simple arithmetic operations while shaders have plenty else to be getting on with.
Yeah, that's pretty much what I'm thinking - it's a sufficiently well-defined operation that even if it doesn't offload much from the shaders, it's an easy enough win that why not? Plus, when you factor in edge AA, maybe they're not quite as trivial as described there.

One thing about that link is it's 15 years old. GPUs from 2009 were a lot simpler, narrower, and slower than modern GPUs. Today's have about 100x the compute power and like 15x the memory bandwidth.

Personally, if somebody asks a basic question I tend to start with a basic answer.
Basic is fine, but it shouldn't be wrong. If you say it's just about subdividing triangles, then the very next question is: why would you do that, instead of just rendering bigger triangles? Now you have to explain that you lied and they weren't really triangles, after all. Don't simplify to the point where your answer is a lie. Not everyone will ask the follow-up question and instead might just walk around, holding the wrong idea in their head.

I don't consider it misleading any more than I'd consider saying "the number is stored at a memory address" misleading because what really happens is a load of high and low electrical voltages are applied to a specific arrangement of NAND gates.
I don't consider that equivalent, because I think we all understand that a number is an abstract concept, computers are electronic devices, and therefore electronic circuitry is used to have the effect that a numeric value can be stored and later retrieved (or overwritten) at the set of memory cells identified by that address. Depending on what someone is asking, you can give them a satisfactory and self-consistent answer, without getting into those implementation details.

Even AMD choose to use the term "Triangle Patch Mesh" (Slide 9) and NVIDIA "Input Triangles" (Slide 20).
Neither of them are talking about planar triangles. The AMD slide is talking about triangular patches. Nvidia is talking about point-normal triangles, which are a cubic bezier surface defied by a set of vertices and normal vectors. As these are slides, they encourage abbreviation or short-hand.

Furthermore, they're being presented to a technical audience who understands tessellation is mainly about patch rendering, so they can afford a certain economy of language. That's fundamentally different than how you would break it down for a neophyte.
 
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Those CPUs do die out eventually. I wonder if they still get 386 and 486 replacements from Intel (despite the fact that it is proclaimed such CPUs are no longer in production) or acquire such parts in new or pristine condition from other sources which have kept them that way.

The thing likely to kill Hubble is the gyroscopes and reaction wheels failing, it has gone through a few periods of inactivity lately. Including a recent failure in December. There was talk of at least re-boosting Hubble with a SpaceX mission back in 2022, but given how close it is to the end of its service life, they may not bother. The origins of Hubble as a spy satellite have also been repeating. Replacements and spare spy satellites have been given to NASA several times and launched as research satellites for performing sky surveys and other duties like weather. They just didn't get much press.

Last I recall, NASA still had a supplier in the US for one large process node. Like 120 um for radiation proofing. I'm struggling to find it as all that is showing up is the more recent news.


Also in recent times they are contracting out to Microchip and others for a new generation of space based computing based on ARM and RISC-V. A lot of it is project independent. Basically the design team decides what technology to use, either due to familiarity or as a test in itself to determine what direction future designs will go.
 
The origins of Hubble as a spy satellite
Do you have a good source on that? It's sort of hard to believe, given how purpose-built it was, as a space telescope. It didn't just drop in NASA's lap, either. It was in development for like a decade, before it launched.

Last I recall, NASA still had a supplier in the US for one large process node. Like 120 um for radiation proofing. I'm struggling to find it as all that is showing up is the more recent news.
The Perseverance Mars rover use a PowerPC CPU that ran at just a couple hundred MHz and was made on a big old node.

What I find funny is the Ingenuity helicopter uses a commodity Qualcomm phone SoC that's made on like 16 nm, and it was fine for a couple years (eventually chipped a rotor, so now it's grounded).

Another commodity part on Mars is supposedly the landing cameras, which are just GoPro's.
 
Another commodity part on Mars is supposedly the landing cameras, which are just GoPro's.
The underside of Ingenuity, and a common $200 drone.
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Similar function, similar design.
 
Do you have a good source on that? It's sort of hard to believe, given how purpose-built it was, as a space telescope. It didn't just drop in NASA's lap, either. It was in development for like a decade, before it launched.

All the additional instrumentation and making the core system fit for purpose was part of the lengthy development, also quite a few delays that pushed back the Hubble launch, including Challenger. My understanding is the basic design and some core components are shared with the Keyhole spy satellite series, including the mirror size.

I think the NRO has since gifted three different systems to NASA. They are never fully functional, just the left overs and then get reworked into things.

https://en.wikipedia.org/wiki/Hubble_Space_Telescope#Construction_and_engineering

https://en.wikipedia.org/wiki/KH-11_KENNEN