jimmysmitty :
Even with multi-threading SMT still requires optimization because it does not act the same as a real core. That was the biggest downfall to the P4s HT was that no programs were optimized for it but it still saw it as a secondary core and would bottleneck it. Once optimizations for SMT came in it acted vastly better. Just because an app can utilize two cores does not mean it will automatically perform better due to SMT, it requires the OS understanding how the registers and pipeline work for SMT to utilize it properly. That is why even today that not all multi-threaded applications benefit from an i7.
Although you are correct about this and it is part of my point, it is not everything. The software was not all that needed improvement, the hardware was changed around as well. More ideal cache hierarchy and performance, hugely better memory performance with the IMC, and more registers all helped as well. Furthermore, why an app might benefit from another core but not SMT wasn't what mattered as far as marketing goes- AMD was correct and this proves it, whether or not it was through bashing that they made their point.
jimmysmitty :
And bashing is bashing. They said that SMT was never a good idea nor was a MCM design vs a monolithic design. And MCM has not changed much at all. SMT has but not enough to say it is a vastly superior technology. It is much like CMT. CMT was a bad idea at the time but once Windows had optimizations built into it CMT started to shine more since the OS understood how to handle the threads.
Fair enough with bashing is bashing, I wasn't denying that it happened, only saying that I didn't think what is happening now is ironic even with that past in mind. However, with MCM especially, a lot more has changed in how effectively it works even if not in exactly how it works. Simply by removing the FSB bottleneck, MCM performance scaling skyrocketed. With SMT, granted more of the improvements were in software than hardware, it has still improved significantly even on the hardware side. Although perfect scenarios would see up to a 30% increase, we can reach for that 30% instead of 10% or 15% much more often even under the venerable XP with current processors than we could with P4s with HTT.
CMT performance really didn't change much with software optimization, vastly unlike SMT. However, that's not to say that it is an inherent flaw or feature of CMT. That's merely what we've seen from the Bulldozer architecture and its derivatives, and that shouldn't be surprising considering the weak cache, high cache capacity, weak memory controller, and poorly inspired Netburst copy of an architecture relative to primary competitors Sandy Bridge and onward. The high capacity of the cache will negate most of the disadvantages of sharing the L2 between two cores and the poor performance of the cache and memory controller stop CMT from mattering anyway.
Whether you have two threads loading up a module or two threads loading up one core each in two modules doesn't make a big difference because the L2 cache and the L3 cache are both similarly high latency and average capacity per core unless you're doing floating point work. If AMD had L2 cache comparable to Intel's, then CMT may have actually done something when it had software optimization compared to not having software optimization, but only when the application could take advantage of more cache and/or faster shared cache with another core. Funny thing is that if Zen fixes the cache latency like AMD claims it will but does not use CMT, then AMD will not be using CMT in the first time where it actually could've had a chance at being useful.
AMD has a history of saying things are bad. when they are not. They laughed at Core 2 when Intel first announced it thinking that K8 was invincible. Funny enough they got a taste of the Core uArch when Intel released a PGA479 to PGA478 adapter and people threw a Pentium M on a desktop board and overclocked it where it was smoking Athlon 64 and Pentium EEs left and right.
Point is, both sides have had ideas the other has bashed. Intel said a IMC was not necessary when it was. [/quotemsg]