News Firm predicts it will cost $28 billion to build a 2nm fab and $30,000 per wafer, a 50 percent increase in chipmaking costs as complexity rises

[Admin]

As wafer fab tools are getting more expensive, so do fabs and, ultimately, chips. A new report claims that

Firm predicts it will cost $28 billion to build a 2nm fab and $30,000 per wafer, a 50 percent increase in chipmaking costs as complexity rises : Read more

 

[coolitic]

I wonder if we're going to start having lines of products using cheaper nodes, but still giving them generational improvements to architecture. AMD is kind of doing that already with their I/O chiplets.

 

[usertests]

256 dies at 15x15 (225mm^2) which would be a budget GPU (Navi 23 = 237, Navi 33 = 204mm^2) or larger APU (Renoir = 156, Cezanne = 180, Rembrandt = 208, Phoenix = 178mm^2). $138 at 85% yield.

Massive increases in wafer cost aren't good, but they aren't a death knell for consumer electronics. It might add $50 to the BOM of smaller stuff. The perf/efficiency benefits are going to outweigh the $50.

I wonder what die sizes we'll see for Strix Point (AMD's first mainstream 12-core APU) and Strix Halo (chiplets?).

I wonder if we're going to start having lines of products using cheaper nodes, but still giving them generational improvements to architecture. AMD is kind of doing that already with their I/O chiplets.

A simple solution might be to get all L3 cache (SRAM) off of the latest node, and make 3D stacking of L3 cache made on a cheaper node the standard. Not just for premium products. If it would be too large to fit in 1 layer, increase the layer count.

Come on Samsung, start making stacked SRAM already:
https://news.samsung.com/global/sam...-technology-for-high-performance-applications

 

[DavidMV]

I think you are going to see older nodes (7, 10, 14, 28 nm) stick around a lot longer than expected. Not everything needs to be the latest nodes, those new nodes will be reserved for very high performance battery powered devices. Maybe that is why there are so many new fab buildings being built, the old lines aren't going away like they normally would.

 

[George³]

The problem seemed completely honestly considered and calculated. Even mathematically it looks good. How do I trust any calculations when I don't have company information on wholesale pricing? Anyone can set false metrics to begin with and then make calculations with them that are mathematically infallible.

 

[usertests]

The problem seemed completely honestly considered and calculated. Even mathematically it looks good. How do I trust any calculations when I don't have company information on wholesale pricing? Anyone can set false metrics to begin with and then make calculations with them that are mathematically infallible.

There has been plenty of news on wafer costs, and a clear trend:

https://www.siliconexpert.com/blog/tsmc-3nm-wafer/

You just need to use one of the online wafer calculators to figure out how many dies of a certain size are possible on an industry standard 300mm diameter wafer, divide the numbers, divide by 0.85 to represent increased cost from bad yields, etc.

https://www.silicon-edge.co.uk/j/index.php/resources/die-per-wafer

 

[George³]

Yes, a lot of news, and each of them carries company pricing secrets that are otherwise kept in a safe away from the eyes of customers and competitors.
I can't argue with the trend. Maybe I should not trust the slope of the graphs. Too steep it seems

 

[sjkpublic]

50 percent increase in cost, 50 percent increase in speed and decrease in electric going from 3 to 2nm. Generally speaking.

 

[Sippincider]

I think you are going to see older nodes (7, 10, 14, 28 nm) stick around a lot longer than expected. Not everything needs to be the latest nodes

Indeed. Consider mundane-but-crucial applications such as automotive powertrain and PLCs (programmable logic controllers). The ones that had trouble getting chips during Covid.

Chips for these need to be available and reliable under tough conditions, more than they need to feature cutting-edge nodes.

 

[Co BIY]

If the $50 dollar chip in the $1400 iPhone doubles to $100 in the $1800 future iPhone I doubt it'll make a big difference.

There is a point to be made about reducing returns on improvements that will eventually occur even if Moore's "law" continues without interruption. The types of applications that can make reasonable use of the increased performance at the bleeding edge will become a smaller and smaller.

 

[Co BIY]

I think you are going to see older nodes (7, 10, 14, 28 nm) stick around a lot longer than expected. Not everything needs to be the latest nodes, those new nodes will be reserved for very high performance battery powered devices. Maybe that is why there are so many new fab buildings being built, the old lines aren't going away like they normally would.

The older nodes aren't just sticking around - TSMC is building new Fabs for "Mature" nodes.

https://www.anandtech.com/show/17456/tsmc-to-expand-capacity-for-mature-and-specialty-nodes-by-50

 

[sjkpublic]

Now is part of the increase the cost of Politics? Not clear where the Fab is located. Is it located in Tawain? Then insurance costs are higher. Is it located in US? Then labor costs are higher. But then, how are they factoring Gov handouts (tax breaks, etc)?