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On Thu, 08 Sep 2005 21:41:35 -0400, Tony Hill wrote:
> On Wed, 07 Sep 2005 05:59:41 GMT, Wes Newell
> <w.newell@TAKEOUTverizon.net> wrote:
>
>>On Tue, 06 Sep 2005 22:18:40 -0400, keith wrote:
>>
>>> On Tue, 06 Sep 2005 19:13:54 +0000, Wes Newell wrote:
>>>
>>>> FSB by definition connects the CPU to the chipset.
>>>
>>> Nope. As George stated, it was in opposition the "back-side <cache> bus"
>>> of the P6. The P5 had no "FSB".
>>>
>>Under your definition of FSB, then no AMD CPU's have ever had a FSB. Let's
>>see just how many people you can convince of that.
🙂
>
> Not true at all. The original AMD Athlon had both a front-side bus,
> connecting the CPU to the chipset, I/O and memory, and a backside bus
> that connected the CPU to the cache chips on the Slot-A cartridge.
> This was actually the last x86 CPU that I'm aware of which did have a
> frontside bus (Intel had already gone to integrated cache by this
> time).
Just because the cache is integrated doesn't mean the cache isn't on the
"back side" of the processor. The "back-side" concept was really a
separation of the cache from the memory busses.
> Of course, the EV6 bus used to connect Athlon CPUs to their chipsets is
> only kinda-sorta a bus in itself. Really it's more of a point-to-point
> link, though it's in that fuzzy area that blurs the lines between the
> two a bit (where the GTL+ bus used in the P6 is definitely a bus and
> Hypertransport is definitely not a bus, EV6 falls somewhere in between).
Works for me.
>>While the term may have originated the way you say, it was then later
>>used to indicate the connection between the CPU and the chipset.
>
> Yes, a lot of people incorrectly refer to the a connection between the
> CPU and the chipset as a "Front Side Bus". Just because lots of people
> make a mistake that doesn't mean that they are right.
Yep! It ignores the reason it was called the "front-side bus" to begin
with.
> People also still call the memory controller the "northbridge" and the
> I/O chip a "southbridge", which also makes no sense given that they are
> no longer being connected via PCI and they usually aren't bridges at
> all. Again, just because people incorrectly use a term doesn't make it
> correct.
As long as there is an off-chip memory controller and high-speed
peripherals on the "bridge", it's proper to call it a "north-bridge". If
there is a low-spped bridge hanging off that, "south-bridge" is a useful
concept.
>> Now, that same
>>connection is the HT link of the K8. So it only makes sense to use the
>>same terminology for the very specific connection even though memory
>>data now has own single use bus for the memory.
>
> It doesn't make any sense with the AthlonXP or the P4 and it makes MUCH
> less sense with the Athlon64/Opteron. Just because it's a common
> mistake doesn't make it any less of a mistake.
Why doesn't "front-side bus" work with the P4 or K7? The cache is still
on the "back side" of the processor, even though it's on the chip.
<snip>
>> They function fully indepentant of other buses. If I assume you
>>are talking about the HT link used to connect the K8 cpu's to the
>>chipset, I'd just answer that it's in the same place as back side of the
>>K7 CPU's FSB. You're really digging a hole for yourself here.
>
> The original Athlon had a backside bus with to the cache chips on the
> cartridge. This was later removed with the "Thunderbird" chips with
> integrated cache. As such, from the "Thunderbird" on forward (including
> all AthlonXP chips) there was no FSB on the AthlonXP. Same goes for the
> PIII from the "Coppermine" onwards as well as ALL P4 chips. None of
> those have FSBs, despite the fact that many people incorrectly use the
> term to describe the system bus of said chips.
No, the back side bus wasn't removed. It was integrated onto the chip.
The architecture is the same, if the parts moved around.
>>>> IOW's using the term FSB
>>>> specifically refers to the connection between the CPU and chipset,
>>>
>>> No, it doesn't. I specifically refers to the fact that the caches are
>>> on the other side (back side) of the P6 memory bus. That architecture
>>> was around for a while, so it stuck. There was no "FSB" in the P5
>>> architecture. It's an invention of the P6 and should stay there,
>>> since it no longer describes any function.
>>>
>>Why are you stuck on the Pentium Pro. FSB has been used for years to
>>indicate the connection between the CPU and the chipset.
>
> The term "Front Side Bus" was never used with the Pentium chips because
> there was only one bus. FSB came into computer use with the PentiumPro
> where Intel introduced a chip with a Frontside Bus (connecting to main
> memory and I/O) and a Backside bus (connecting to cache). The
> terminology continued through the PII and early PIII chips, as well as
> early Athlon chips, as they had two buses, one for memory and I/O and
> the other for cache. For chips with only a single bus the term "FSB"
> makes no sense. Never has and never will, no matter how many people
> make such a mistake.
I dissagree. The back-side bus was integrated onto the chip. Again, the
memory architecture was the same.
> With the Athlon64 and Opteron it's just more obviously incorrect than it
> is with the AthlonXP and P4 chips.
It *is* incorrect, not so with the P4 or K7.
>>>> while
>>>> using the term HT link could be any of many different type of
>>>> connections an HT link is used for since it's used in many more
>>>> applications than just a FSB. Some refer to the bus as a system bus,
>>>
>>> "System bus" works for me. I/O bus makes more sense.
>>>
>>Let's see, system buses. PCI, PCI-E, ISA, AGP, and others are all system
>>buses. So how are you going to distinquish which one you are talking
>>about if you just use system bus? Damn, I wonder if FSB would do
>>that?
🙂 I/O bus. Ditto, and you can throw HTlink into the mix too since
>>it is also an I/O bus.
> Hypertransport is NOT an 'bus' in any way, shape or form. HT is a
> point-to-point link. PCI-E and AGP are also definitely not buses,
> though I expect many people to incorrectly call them such. PCI and ISA
> are buses
True enough. Apparently some people call ducks geese too. ;-)
--
Keith
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