Global Foundries Demonstrates 3D TSV Capabilities on 20 nm Processors

[RedundantInk]

Global Foundries' TSV technologies will allow multiple chips to be stacked on top of each other and provide an avenue for "delivering the demanding performance, power, and bandwidth requirements of today's electronic devices"

Global Foundries Demonstrates 3D TSV Capabilities on 20 nm Processors : Read more

 

[slomo4sho]

Now to address the issue of heat dispersion associated with chip stacking.

 

[roflplatypus]

cool, i hope they have this for AMD's piledriver.

 

[ikyung]

The silicon era is slowly coming to an end.

 

[InvalidError]

[citation][nom]slomo4sho[/nom]Now to address the issue of heat dispersion associated with chip stacking.[/citation]
Simple enough: if they stack DRAM/NAND which are rather quite low-power compared to CPUs, they just need to put the CPU on the top-most layer so it can make contact with whatever heatsink/heat-spreader the application has available.

 

[madjimms]

[citation][nom]roflplatypus[/nom]cool, i hope they have this for AMD's piledriver.[/citation]

I thought AMD left Global Foundries...

 

[InvalidError]

[citation][nom]ikyung[/nom]The silicon era is slowly coming to an end.[/citation]
There is a good 15-20 years left in it and there are no guarantees that there will be a cost-effective replacement ready before then.

 

[griptwister]

[citation][nom]madjimms[/nom]I thought AMD left Global Foundries...[/citation]
The did. Lol, this guy must of been living under a rock or something.

 

[Guest]

[citation][nom]griptwister[/nom]The did. Lol, this guy must of been living under a rock or something.[/citation]

Wait, AMD doesn't use Global Foundries anymore? I know they are separate entities now but i thought they still manufactured AMD's CPU's.

 

[A Bad Day]

[citation][nom]athulajp[/nom]Wait, AMD doesn't use Global Foundries anymore? I know they are separate entities now but i thought they still manufactured AMD's CPU's.[/citation]

AMD still does kinda use GF. It's just that the AMD-GF relationship has downgraded to "old couples non-stop bickering".

 

[dragonsqrrl]

[citation][nom]athulajp[/nom]Wait, AMD doesn't use Global Foundries anymore? I know they are separate entities now but i thought they still manufactured AMD's CPU's.[/citation]
They do, I'm not sure what madjimms and griptwister are referring to. Maybe they're thinking of AMD's E series APU's, but I'm not sure how that translates into AMD leaving GF. AMD still relies on GF for a lot of their manufacturing, and will probably continue to for the foreseeable future.

 

[dalethepcman]

[citation][nom]slomo4sho[/nom]Now to address the issue of heat dispersion associated with chip stacking.[/citation] Exactly, This might be great for extremely low power/high efficiency workloads, but I wouldn't expect ground breaking GHZ unless you operating these i submersed in liquified gas.

 

[The_Trutherizer]

This is... exactly what I have been waiting for.

 

[Wisecracker]

AMD has their own 3D IP.

Not sure if this is a demonstration of it -- or something that GloFlo cooked-up on their own.

 

[A Bad Day]

[citation][nom]dragonsqrrl[/nom]They do, I'm not sure what madjimms and griptwister are referring to. Maybe they're thinking of AMD's E series APU's, but I'm not sure how that translates into AMD leaving GF. AMD still relies on GF for a lot of their manufacturing, and will probably continue to for the foreseeable future.[/citation]

If you looked at AMD's SEC filing, you'll noticed that they cut back on a lot of payments to GF due to GF not being able to produce enough quality silicon dies when AMD needed them.

 

[hector2]

20nm will be hard enough for GF to get decent yields on without adding TSV

 

[nieur]

TSMC must also be having similar technology to develop maxwell chip

 

[bit_user]

Something tells me memory bandwidth of mobile SoC's is about to go through the roof!

BTW, IBM's Power 7 server/mainframe CPU is already using similar tech.

 

[Uberragen21]

[citation][nom]dalethepcman[/nom] liquified gas.[/citation]
Now there's an oxymoron if I've ever seen one.

 

[ojas]

OHHHHH This is what Nvidia's using for Volta!

[citation][nom]Uberragen21[/nom]Now there's an oxymoron if I've ever seen one.[/citation]
I thumbed you up but then i realised i shouldn't have; gas is a fluid not a liquid.

 

[vaughn2k]

[citation][nom]InvalidError[/nom]Simple enough: if they stack DRAM/NAND which are rather quite low-power compared to CPUs, they just need to put the CPU on the top-most layer so it can make contact with whatever heatsink/heat-spreader the application has available.[/citation]
Why not integrate this in a chip instead of stacking them (same as what the APU is today). That is the purpose of miniaturiazation (nanotech) and eliminate assembly cost.

 

[alidan]

[citation][nom]slomo4sho[/nom]Now to address the issue of heat dispersion associated with chip stacking.[/citation]
if you stack a chip, lets say 4 layers, you effectively make the space it takes up on a wafer 1/4th correct
you also bring parts of the chips closer together so you need less of a clock to reach the same speeds as a flat only chip... less travel distance for the data.

now lets not say silicon will do this, but graphene, which can be aircooled when its running what, 50ghz... 100ghz... that is where this will really come into play...

also, if you could make cure its a 100% air tight seal... you could oil immerse the chip correct? or is my thinking wrong on that? im talking about a non oil immersed pc, just the chip.

 

[InvalidError]

[citation][nom]vaughn2k[/nom]Why not integrate this in a chip instead of stacking them (same as what the APU is today). That is the purpose of miniaturiazation (nanotech) and eliminate assembly cost.[/citation]
The problem with intagrating DRAM in high-speed CPUs is that DRAM process is tuned for lowest leakage and high-K to make individual DRAM cells more stable while CPU process is tuned for low-K to minimize capacitive switching power, propagation delays and does not care quite as much for the extremely low leakage DRAM requires.

The fabbing requirements between CPUs and DRAM are almost polar opposites, which makes it nearly impossible to integrate DRAM in a high-speed ASICs.

Logic inside DRAM chips is extremely slow. If an i5 got fabbed on a DRAM production line, I bet it would not run at more than 400MHz and due to high-K, it would not be particularly power-efficient either due to very high switching losses.

 

[dalethepcman]

[citation][nom]Uberragen21[/nom]Now there's an oxymoron if I've ever seen one.[/citation]

Derp... your smart... Yes, liquefy a gas, you can also liquefy a solid, but you cannot liquefy a liquid...

Liquefy- To cause to become liquid, especially:
a. To melt (a solid) by heating.
b. To condense (a gas) by cooling.