[citation][nom]army_ant7[/nom]Lots of stuff!
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Sorry i was feeling too lazy to quote para by para
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1) Wolfgang. You've been reading Tom's for longer than i have (just checked your join date
😛) so you'd remember Wolfgang's articles in the past. That's just decimated my image of him, possible beyond repair. I think i've only read 2 articles in the last ~2 years that i though made sense, but usually his analysis is the typical "Apple rules, ARM is the future, x86 and Windows suck and are bloated" etc. Plus he's an analyst, and i don't like analysts, simply because a majority of them seem to be more focused on spewing BS that influences the market. Zak Islam seems to be Wolfgang's pseudonym. Tom's news section is probably only still worth reading because of Jane and Catherine.
Anyway, he completely sucks at interpreting hardware news most of the time.
2) Ah sorry. Actually I've been very confused about what TDP is for a long time, and the internet hasn't helped. So i was kind of explaining and thinking out loud too, hoping you (or someone else) would correct me if i was wrong.
But anyway, second para i meant that, if TDP is defined as the power dissipated at TjMax, which seems to be 105*C for all processors irrespective of their lithography (probably a property of the silicon they're using, not sure), then those ULV processors hitting 15w (with a TDP of 17w) weren't really close to TjMax at all (of course, as you said that would vary with cooling, but then why is TDP defined at TjMax?), and that TDP could be a fairly good indicator of power consumption.
3rd para: My processor has a TDP of 95w. Under prime95, system power consumption goes up by around 65-70w. Since the most load is on the CPU, obviously 95% of the power increase is because of the processor. b/w 64w and 130w, i don't expect the PSU's efficiency to vary a whole lot (it's a 550w PSU after all, so this is a variation b/w 11% load and 23% load, and the efficiency curve doesn't vary all that much between these points).
I'd assume that the processor takes at least 20w to operate when idle at 2.0 GHz. So 65+20=85w at load, at least, which is close to the TDP value. Really an extension of the point in the first and second para. Though it's worth noting that the entire "standard power" Core 2 Quad family has a TDP of 95w, even those monsters clocked in excess of 3 GHz, and i suppose they'll consume quite a bit more power (a 4% OC on mine was showing about 2w more), probably almost hitting their TDP.
BTW, i just remembered, SiSoft Sandra reports my CPU's power consumption to be 142w at load and about 45w at idle, i've no clue how it pulls out those numbers.
Bulldozer...i'm not sure about that, because CPU power consumption numbers are very rarely reported separately, it's usually total system power consumption that reviewers tend to list. But you might be right because i used to think that TDP was an indicator of average power consumed by the CPU, and now that i'm thinking about it, i do remember having a conversation on the forums about TDP when the Bulldozer articles went live. Yeah i think you're right really. There was something like that. I remember the discussion going like "Intel states max possible power consumption but maybe AMD only states average power" or something like that. Yes.
I pulled the Phenom II X4, Core i7-920, and Core i5-2500K runs off of this graph because they cluttered it up way too much. The three chips left are, in my opinion, the most relevant.
The black line corresponds to Intel’s 95 W Core i7-2600K, which averages 155 W system power use throughout a complete run of PCMark 7. Before you mention that the Core i5-2500K is closer, price-wise, to the FX-8150, know that it averages just two watts less than the -2600K, at 153 W across the entire run. Imagine that its plot would look almost identical.
The FX-8150, in comparison, averages 191 W. That 34 W delta almost exactly correlates to the 30 W separating Intel’s 95 W rating and AMD’s 125 W TDP. Even more interestingly, the Phenom II X6 1100T hits the same 191 W system average across PCMark 7. Meanwhile, the Phenom II X4 980 averages 184 W.
Intel’s Core i7-920 stands out as the one model to use more power than AMD’s new flagship. A 193 W average consumption number is 2 W higher, which we’d consider reasonable given a 5 W-higher TDP.
http://www.tomshardware.com/reviews/fx-8150-zambezi-bulldozer-990fx,3043-22.html
There's another article about efficiency. I didn't try finding the comments i was looking for on that article because the comments section is 27 pages long! Too much work
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3) My knowledge of binning is from "here and there" too
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But yeah your points make sense regarding under-volting. I think the thing is that a circuit can only sustain a certain frequency and if that frequency is too high or too low then you face a problem. Increasing voltage probably helps in biasing and all (i need to study a bit more regularly, I'm in an electronics engineering course in college :lol: Though in my defense we've only studied very basic stuff and CPU architectures are still a year away!) and stabilizing the circuit, conversely undervolting would make the circuit less stable unless clock speeds are dropped. This i believe varies a lot with transistor design and nature of materials used (for example the base-emitter junction will have a potential diff of 0.7v for a silicon BJT and a different value for a Gallium transistor (which i don't remember!); but then there are tri-gate transistors being used here and i don't really know how they work). If you knew all this then do forgive me for rambling on like this
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but yeah i think purer the silicon, the more tolerant it is to over- and under-volting and clock speed changes. And yeah binning is pretty much what you said afaik. Though what i meant was that i doubt that slightly defective or impure silicon or improperly formed chip parts that are deemed "good enough" but not perfect would really change the power consumption figure in any significant way. If they would, i think Intel would simply disable those parts.
Also, yes from what i've read so far in school/college is that Heat dissipated Power*time= VIt =(I^2)*R*t = [(V^2)/R]*t.
So naturally heat and power are non-linearly related to voltage, and so your point should be perfectly valid, lower the voltage and you get much less power consumption.
4) I think turbo boost limits ARE set for Tcase, looking at that Intel link. What i believe is that Tcase is the temperature at which Tj = TjMax, or at least close to it. I'm not sure. They say that they measure TjMax for mobile chips since they don't have an IHS, but for desktop parts they rather measure the IHS temperature.
So obviously there's some relation b/w Tj and Tcase, but i don't think they're equatable because i'd suppose Tj>Tcase since i doubt the TIM b/w the IHS and the "junction" will be 100% efficient, and you can't have a perfect heat sink anyway.
But since they don't monitor Tj for desktop parts (or do they? I can't say, maybe it's not revealed to the BIOS)...wait. I just confused myself. If Tj is visible to the CPU but not to the BIOS, the answer to this Turbo question can only be decided if we know which part is responsible for controlling Turbo Boost, the motherboard or the CPU itself. If it's the motherboard, then Turbo should be controlled by Tcase. If it's the CPU, it should be some percentage of TjMax. But the Turbo behaviour is usually set by the BIOS, so i'm not sure at all.
Looking at my experience with the ULV chips, i think that in the case of mobile chips at least, it's some percentage of TjMax. I don't have the CPUz or Core Temp screenshots/csv files anymore, otherwise would have checked what was happening back then.
If you have a SB/IB CPU then maybe you could check what happens to turbo boost when the reported temperature reaches
5) The paste/solder thing. Since TDP in the case of desktop chips is the max heat the IHS diode should be exposed to (assuming TDP is defined here at Tcase), it's the heat that the IHS can handle (and thus it's the heat, i.e. power dissipation every second, that a cooler would have to handle to keep the IHS temp under Tcase). Now from what i understand is that the better the TIM under the IHS, the more quickly the IHS temp will reach Tcase.
So with Ivy Bridge, using paste instead of solder slows the heat transfer from the cores to the IHS, so while Tj remains higher (but presumably less than TjMax), Tsink (i made this up for the IHS temp at any given moment, to differentiate it from Tcase which is the safe limit) remains lower, meaning that the cooler has to work less to maintain a specific Tsink temperature.
So if they used solder, they'd have a lower Tj but a higher Tsink, meaning that they
might have had to increase the TDP, since their cooler division would manufacture coolers accordingly.
Now in haswell's case, i'm assuming that they've also increased the TDP because they're reverting to solder, meaning that they'll be able to keep Tj lower while increasing Tsink, thus they'll have to raise Tcase in the process, since it'll heat up faster.
So the higher TDP should actually mean that IHS is pulling more heat away from the cores, but then it also needs to be cooled more effectively, since it's not a perfect heat sink.
CPU cooling is a story of heat sinks: the TIM b/w the cores and the IHS, the IHS, the part of the cooler that pulls heat from the IHS (helped by thermal paste, which is another sink) and the fins of the cooler that dissipate heat into air (which is also a sink with respect to the copper heat pipes and plate that makes contact with the paste), and air is of course the last sink, which is almost a perfect heat sink as long as it keeps flowing (and you get more fresh air around the fins).
Obviously if the first stage is crap then the second (the IHS) cant do too much about it. In the case of Ivy, i think that the first stage was made a (deliberate?) bottleneck so that they could lower the TDP and Tcase.
My entire theory right now depends on the Tcase set for Haswell, and of course more info on the mysterious HD 4600 graphics.
6) Yes speculation is immense fun, and the unfortunate wait is unsettling! Also, for the first time i actually know enough to speculate on stuff like this (now that i can somewhat understand what Chris and Anand write when they discuss CPU archs, earlier it used to go over my head and induce a headache :lol
, though i'm not sure if i know enough to be right! Which is like this personal challenge i'm giving to myself.
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BTW you're one of the politest people i've met here on Tom's! *respect*
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