News Intel: 3nm Node Meets Yield and Performance Targets

[thestryker]

I know, but Intel's name is "Intel 3" not "Intel 3nm-class". So calling 3nm-class is a choice of Anton, not a fact. May be someone can compare it with TSMC N3 and is a 3nm-class or compare with TSMC N4 so it is a 4nm-class, with Samsung, and so on. Imho this is not a fact but a personal choice.

Intel renamed 7+ to Intel 3 precisely because it does compete directly with TSMC's N3 and Samsung's 3nm. Seeing as those are "3nm-class nodes" it's entirely accurate to call Intel 3 a "3nm-class node" as well which is why every time it is mentioned that way in the article it's "Intel's 3nm-class node".

The source is the link in the article that point to another article of Tom's Hardware (Paul Alcorn).

There was no 7nm ESF it was called 7+. Just like how 20A/18A were 5nm and 5+.

In the final you close the article writing that Intel 20A is a 20 Angstrom when instead is a 5nm process.

That's not actually what is written in the article... 20A is named 20 Angstrom and referred to as a "2nm-class" which is what it is.

By all means criticize inaccuracies, and I agree with you about the title and obviously Intel 3 being 7+ not 5nm, but the rest you're simply not right about. Intel previously never renamed node enhancements only every full node, but their competition started to. When Intel fell behind they had no choice but to change up their naming to match the industry rather than internal. It doesn't matter what Intel's internal names may have been, all that matters is what it means comparatively to the industry.

 

[kjfatl]

What are the chances that the short life on Intel 3 is that it is simply a subset of Intel 20A? If this is the case the fabs for Intel 3 will probably be shut down within 3 years, and upgraded to Intel 18A or newer with parts built on Intel 3 migrated to the Intel 20A fabs.

 

[thestryker]

What are the chances that the short life on Intel 3 is that it is simply a subset of Intel 20A? If this is the case the fabs for Intel 3 will probably be shut down within 3 years, and upgraded to Intel 18A or newer with parts built on Intel 3 migrated to the Intel 20A fabs.

Intel 3 is a subset of Intel 4 and they won't be going anywhere anytime soon due to the ever increasing costs of shrinking nodes. We will likely see the leading edge products from Intel move on, but I'd expect things like Atom class CPUs to use it as well as IFS customers. In terms of Intel I wouldn't be surprised if Intel 4 was a one and done with MTL somewhat like the first 14nm was with BDW, but I'd expect Intel 3 to be around for quite some time.

 

[bit_user]

What are the chances that the short life on Intel 3 is that it is simply a subset of Intel 20A?

20A has GAA (Gate-All-Around) transistors and PowerVias (backside power delivery), while Intel 3 has neither of those things. These are both fundamental differences, not small tweaks.

If this is the case the fabs for Intel 3 will probably be shut down within 3 years,

Intel maintains product availability windows of up to 10 years, for some of their products. Many chips don't require the latest & greatest node, such as motherboard "chipsets" and the I/O tiles in their tile-based CPUs. Not to mention things like Ethernet controllers, which tend to be made on much older nodes.

Then, there's the matter of foundry customers, many of whom will be making an assortment of chips that likewise won't require the latest & greatest node and would rather reduce costs by using an older, more mature node.

All of that is to say that while some of Intel 3 production capacity could eventually get upgraded to newer nodes, they will likely retain some Intel 3 production lines for a long time to come.

 

[InvalidError]

What are the chances that the short life on Intel 3 is that it is simply a subset of Intel 20A? If this is the case the fabs for Intel 3 will probably be shut down within 3 years, and upgraded to Intel 18A or newer with parts built on Intel 3 migrated to the Intel 20A fabs.

Probably not: if you look at the trend towards making each chip on the optimal process for whatever the chip does and then putting the SoC together with 2.5/3D-stacking, we're more likely to see a proliferation of silicon lego bricks. Silicon base interposers with active analog circuitry for external interfaces and power distribution made on 12-45nm processes, caches, low-power cores, uncore circuitry, etc. on 3-5nm processes and only the highest speed stuff made on 20A or smaller.

While everyone is gawking about fabs that make the smallest stuff, there are still many 120+nm fabs quietly making the analog, power and random support chips that make modern gadgetry possible. There are even 1.2um fabs still in operation churning out stuff like power MOSFETs.

Once 3nm falls out of favor for the highest-speed stuff, it'll get tooled for niches that 3nm is particularly well suited for. I can imagine that being L3$, switching fabric and stack memory controllers, large area functions that scale better than external IOs but not as much as typical logic.

We're almost at the end of the silicon scaling roadmap. I expect fabs and their processes to be increasingly long-lived.

 

[bit_user]

We're almost at the end of the silicon scaling roadmap. I expect fabs and their processes to be increasingly long-lived.

I do wonder, since we seem to be seeing a few different effects. It seems to me that foundries are spinning up new nodes and variations on nodes at a faster rate, while the differences between those nodes are getting smaller. For instance, TSMC doesn't only have N3, but also N3P, N3E, and N3X:

TSMC Details 3nm Evolution: N3E On Schedule, N3P and N3X To Deliver 5% Performance Gains

www.anandtech.com

Perhaps some of the bleeding-edge nodes will get decommissioned sooner, while the more refined and optimized variants stick around longer.

 

[russell_john]

I know there were also rumors that Nvidia might move over to Intel for their GPUs and is part of the reason they are delaying next gen until early 2025 instead of late 2024 ..... TSMC delaying their chip fab in Arizona could be a big mistake because if Intel can take up the slack then US companies like Nvidia will go there if for nothing else than the tax breaks for Made in the USA

 

[InvalidError]

Perhaps some of the bleeding-edge nodes will get decommissioned sooner, while the more refined and optimized variants stick around longer.

What is there to decommission? The main attraction from N3 to N3E is six extra EUV layers, nothing to retire there, just throwing more equipment at the problem. From N3E to N3P, the main feature is enhanced precision tweaks to scanners that TSMC will likely propagate to their entire fab over time to improve characteristics and yields across the board.

The only thing really getting decommissioned here would be the customers' ability to order wafers on a process that calls for fewer steps they do not need to save some cash.

 

[thestryker]

The main attraction from N3 to N3E is six extra EUV layers

*six fewer EUV layers and uses no EUV double patterning so it's cheaper to manufacture with, but loses the SRAM density improvement.

 

[dalek1234]

Some smells fishy over here. Acording to a recently leak by MLID channel, Meta just told Intel that Meta is now switching to AMD (to Bergamo, to be exact). Why? Intel recently told Meta that the Sierra-Forest Qualification-Sample that Meta was supposed to receive from Intel this year, will not be available until early 2024, because the CPU needs a new stepping...presumably to correct something. Meta is not willing to put up with another Intel delay, and since Bergamo is available now, it will be going into Meta's new server builds starting now, instead of SF (probably not even by end of q2, 2024)

Yet intel is saying everything is still on track.

 

[bit_user]

... will not be available until early 2024, because the CPU needs a new stepping...presumably to correct something. Meta is not willing to put up with another Intel delay, ...

Yet intel is saying everything is still on track.

I think Intel can say that it's on-track if they believe it will still launch on time.

BTW, that's indeed disturbing. It's hard not to think of the seemingly open-ended schedule slippage Sapphire Rapids experienced. Maybe it triggered some bad memories of that whole ordeal.

 

[NinoPino]

Are you sure about that? The only time I've seen Enhanced SuperFin was in relation to the 10 nm node that later got renamed to Intel 7

You are right. It was simply named 7+.

 

[alan81]

Some smells fishy over here. Acording to a recently leak by MLID channel, Meta just told Intel that Meta is now switching to AMD (to Bergamo, to be exact). Why? Intel recently told Meta that the Sierra-Forest Qualification-Sample that Meta was supposed to receive from Intel this year, will not be available until early 2024, because the CPU needs a new stepping...presumably to correct something. Meta is not willing to put up with another Intel delay, and since Bergamo is available now, it will be going into Meta's new server builds starting now, instead of SF (probably not even by end of q2, 2024)

Yet intel is saying everything is still on track.

I would be shocked if Intel did not have at least one stepping in the plan. Remember the disaster known as Sapphire Rapids required over ten steppings.

 

[bit_user]

I would be shocked if Intel did not have at least one stepping in the plan. Remember the disaster known as Sapphire Rapids required over ten steppings.

But, their plan for providing samples to partners should've accounted for that. I think that suggests they're already beyond the planned number of steppings, for this phase.

 

[alan81]

But, their plan for providing samples to partners should've accounted for that. I think that suggests they're already beyond the planned number of steppings, for this phase.

They have already heavily sampled their customers. Many (most?, all?) of the issues will be very subtle and not something the customer could necessarily notice. That last killer bug for Sapphire rapids was for some sort of exploit a hacker could do.

 

[rtoaht]

My understanding of the matter is yields are still too low.
So instead of making $100-$500 processors they are making $3000-$12,000 processors.
A few less dies per wafer but much higher $/mm² return to make them profitable.
Once yields are much better, we might see client processors.

When the yields are low, typically the fabs make smaller dies NOT the larger ones. That's because it is easier to yield small dies. So, if it is due to yield Intel would have committed tiny Arrow Lake mobile CPUs NOT giant Granite and Sierra dies.

 

[Unolocogringo]

When the yields are low, typically the fabs make smaller dies NOT the larger ones. That's because it is easier to yield small dies. So, if it is due to yield Intel would have committed tiny Arrow Lake mobile CPUs NOT giant Granite and Sierra dies.

But they have 2 supercomputer contracts waiting on these chips to be ready.
So the must persist and deliver them even if yields are low.

 

[rtoaht]

But they have 2 supercomputer contracts waiting on these chips to be ready.
So the must persist and deliver them even if yields are low.

Which supercomputer contracted to Sierra Forrest? How much money are we talking about here?

 

[Unolocogringo]

Intel unveils full specifications of Aurora supercomputer and roadmap for future HPC chips

Intel has delivered most of the Aurora supercomputer to the Argonne National Lab, and it promises over two exaFLOPS of performance.

www.xda-developers.com

 

[bit_user]

Intel unveils full specifications of Aurora supercomputer and roadmap for future HPC chips

Intel has delivered most of the Aurora supercomputer to the Argonne National Lab, and it promises over two exaFLOPS of performance.

www.xda-developers.com

Did you actually read it?

"The Aurora supercomputer is composed of "blades" (also called nodes), which are essentially computers in their own right with each blade holding two 40-core Sapphire Rapids CPUs and six Ponte Vecchio GPUs"
​

It's talking about Sapphire Rapids, which is made on Intel 7 and has already been shipping for most of the year. The comment you replied to stipulated "Granite and Sierra dies", meaning Granite Rapids and Sierra Forest. Those both use the Intel 3 node.