News Intel Announces Ponte Vecchio Graphics Cards, Sapphire Rapids CPUs, and Data Center Roadmap

[Admin]

Intel drops the deets on its Xe Graphics cards, data center roadmap, and Aurora, the world's first exascale supercomputer.

Intel Announces Ponte Vecchio Graphics Cards, Sapphire Rapids CPUs, and Data Center Roadmap : Read more

 

[mihen]

It's interesting that their GPUs will use multiple chips. To me it signals that Intel will not initially be targeting the consumer market with their GPUs and instead target compute GPUs.
If there is any company that is ready to use a fabric to weave together multiple chips using high bandwidth HBM memory, it would be AMD. But even AMD has not gone this route yet which leads me to believe their is something that causes it to run slower as a consumer GPU.

 

[InvalidError]

If there is any company that is ready to use a fabric to weave together multiple chips using high bandwidth HBM memory, it would be AMD.

I don't see why AMD would be any better-suited than Intel, Intel has a whole decade of extra experience with memory controllers in NUMA environments as AMD does from providing most supercomputer CPUs between the last viable Opteron and current day. This is fundamentally the same set of challenges as multi-socket systems shrunk down to multi-chip package level. Packaging-wise, Intel has more multi-chip packaging options than AMD does, so no advantage for AMD there either. AMD may have "more experience" with HBM but you have to keep in mind that the fundamental operating principles of DRAM haven't changed since PC60 SDRAM, so being earlier at adopting a new packaging or frequency/timing range standard with minor tweaks does not mean much.

As far as the consumer space is concerned, Xe is primarily aimed at datacenters, that's what the scalability aspects are aimed at. I doubt the consumer space will be seeing more than a single GPU die for a while, if anything.

 

[DavidC1]

It's interesting that their GPUs will use multiple chips. To me it signals that Intel will not initially be targeting the consumer market with their GPUs and instead target compute GPUs.

This announcement was from the Supercomputer conference, so it has little to do with consumer graphics cards.

We've yet to hear what they'll do in the Radeon/Geforce space.

 

[JayNor]

This quote from the hpcwire coverage is interesting. I wasn't expecting further changes to the ice lake core, but maybe so... Any comments on this statement by the toms' author?

"The 10nm Ice Lake ramp-up continues in the second half of 2020 and will provide more microarchitecture and architectural features for both traditional HPC and AI, said Hazra."

Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI

Intel today revealed a few more details about its forthcoming Xe line of GPUs – the top SKU is named Ponte Vecchio and will be used in Aurora, the first

www.hpcwire.com

 

[JamesSneed]

All we keep hearing about Xe Graphics is related to the HPC space. With that said I think it would be a smart move to first make products for HPC.

 

[InvalidError]

All we keep hearing about Xe Graphics is related to the HPC space. With that said I think it would be a smart move to first make products for HPC.

If you have finite fab capacity available, go for the higher-value markets first like tiny laptop CPUs, HPC, servers and FPGAs. That's why leaked Intel roadmaps showed no apparent plans for anything beyond 14nm in the consumer space until at least 2021. (Though Intel is now claiming it will have 10nm desktop parts later next year, the last time Intel produced desktop parts that weren't on roadmaps as such at least two years ahead of time was Broadwell which turned into little more than a paper launch - limited number of grossly overpriced SKUs, most of which unobtainable until a few months prior to Skylake's launch.)

 

[jimmysmitty]

I don't see why AMD would be any better-suited than Intel, Intel has a whole decade of extra experience with memory controllers in NUMA environments as AMD does from providing most supercomputer CPUs between the last viable Opteron and current day. This is fundamentally the same set of challenges as multi-socket systems shrunk down to multi-chip package level. Packaging-wise, Intel has more multi-chip packaging options than AMD does, so no advantage for AMD there either. AMD may have "more experience" with HBM but you have to keep in mind that the fundamental operating principles of DRAM haven't changed since PC60 SDRAM, so being earlier at adopting a new packaging or frequency/timing range standard with minor tweaks does not mean much.

As far as the consumer space is concerned, Xe is primarily aimed at datacenters, that's what the scalability aspects are aimed at. I doubt the consumer space will be seeing more than a single GPU die for a while, if anything.

The consumer version of the Xe Graphics card for gaming will lead the way in 2020, likely on the 10nm process.

They actually stated it would be 2020 for the consumer gaming card.

What I find most interesting is the way its described it feels like they are talking about Terascale again. Terascale was basically a bunch of cut down P54C chips that could run CPU or GPU tasks.

I wouldn't doubt that Intel is taking all they have learned over the years and throwing it into the best they can. Might actually give nVidia a run for its money if done right in the HPC market.

 

[PaulAlcorn]

This quote from the hpcwire coverage is interesting. I wasn't expecting further changes to the ice lake core, but maybe so... Any comments on this statement by the toms' author?

"The 10nm Ice Lake ramp-up continues in the second half of 2020 and will provide more microarchitecture and architectural features for both traditional HPC and AI, said Hazra."

Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI

Intel today revealed a few more details about its forthcoming Xe line of GPUs – the top SKU is named Ponte Vecchio and will be used in Aurora, the first

www.hpcwire.com

They are refering to Ice Lake server chips there, which have AVX-512 for both mobile and server chips, which is a step forward for vectorized code.

"Intel's new DL Boost suite adds support for multiple new AI features, which the company claims makes it the only CPU specifically optimized for AI workloads. Overall, Intel claims these technologies provide a 14X performance increase in AI inference workloads. Intel also added support for new VNNI (Vector Neural Network Instructions) that optimize instructions for smaller data types commonly used in machine learning and inference. VNNI instructions fuse three instructions together to boost int8 (VPDPBUSD) performance and fuse two instructions to boost int16 (VPDPWSSD) performance. These AVX-512 instructions will still operate within the normal AVX-512 voltage/frequency curve during the operations. "

more here: https://www.tomshardware.com/reviews/intel-cascade-lake-xeon-optane,6061-2.html

 

[JayNor]

Yeah, they've already had avx512 and dlboost in Ice Lake laptop chips. I took the comment to suggest they are adding something else to the Ice Lake Server chips. It could make sense for them to add a second avx512 unit to each core, as they've done in Cascade Lake server chips, if that's what you mean, but they might also want to reserve that as a differentiation for Cooper Lake.

 

[DZIrl]

I do not see how Intel does not understand process. We have 14++++++++++++++++++ now we must have 10++++++++++++++++ before switching to 7.