News Intel axes thousands of technicians and engineers in sweeping U.S. layoffs — cutting 4,000 positions in the U.S., 2,392 in Oregon

[Admin]

Intel is cutting 2,392 jobs in Oregon, with about 4,000 nationwide, mostly affecting technicians and engineers, despite claims of targeting managers, as part of a broader push for automation and decentralization.

Intel axes thousands of technicians and engineers in sweeping U.S. layoffs — cutting 4,000 positions in the U.S., 2,392 in Oregon : Read more

 

[ekio]

All these years of abusing their dominant position to keep selling at maximum price while doing zero RnD to improve their products for a long term healthy vision that cost a lot to their employees now….

Lesson 101 of how total greediness leads to a big screw up.

 

[abufrejoval]

Fabs are the new West Virginia coal mines.

AI data centers will be next.

 

[rluker5]

All these years of abusing their dominant position to keep selling at maximum price while doing zero RnD to improve their products for a long term healthy vision that cost a lot to their employees now….

Lesson 101 of how total greediness leads to a big screw up.

You have that all backwards.

 

[Stomx]

All these years of abusing their dominant position to keep selling at maximum price while doing zero RnD to improve their products for a long term healthy vision that cost a lot to their employees now….

Lesson 101 of how total greediness leads to a big screw up.

Exactly. Let's just compare INTEL to TSMC for example: "TSMC has maintained a stable employment policy over the past decade, with rare instances of firing employees, even for underperformance. The company is known for valuing employee experience and expertise, and layoffs or terminations are not part of its corporate culture, especially at its headquarters.
Instead, TSMC has focused on growth and expansion, which includes hiring and offering raises to workers, even in situations where union negotiations or performance issues arise..."

 

[acadia11]

All these years of abusing their dominant position to keep selling at maximum price while doing zero RnD to improve their products for a long term healthy vision that cost a lot to their employees now….

Lesson 101 of how total greediness leads to a big screw up.

Don’t think it was greed but lack of vision. An inability to adapt and failure to separate foundry from retail business. Especially in a diversified IC ecosystem and shrinking x86 hegemony. Complacency rather than greed. It happens look at IBM and others … it’s hard to stay at the top.

 

[rluker5]

Don’t think it was greed but lack of vision. An inability to adapt and failure to separate foundry from retail business. Especially in a diversified IC ecosystem and shrinking x86 hegemony. Complacency rather than greed. It happens look at IBM and others … it’s hard to stay at the top.

That and it is hard to predict the future then mold your business to it. Sometimes things just won't work. Like Windows not wanting to do x86 phones, or people not wanting Optane. But not being able to keep up with the combination of TSMC and their customers without adequate investments should have been foreseeable.

 

[phead128]

Intel will be a great business school case study on how to blow a leading position by hiring a bean counter, stock buybacks, relying on anticompetitive techniques against AMD and xenophobia against Taiwan in order to suppress competition, but do zero innovation at the same time. Intel is proof that no amount of free taxpayer money can save ingrained leadership incompetence.

 

[Mr Majestyk]

Always the engineers in the firing line while the useless upper management continue to thrive and get obscene paychecks while running the company into the ground. Tan has already proven to be a bad choice and a liar. This is the same clown that railed against Gelsinger sacking engineers not middle-management.

Sack the entire board and CEO!

 

[derekullo]

Fabs are the new West Virginia coal mines.

AI data centers will be next.

Intel's fabs are the new West Virginia coal mines.
TSMC's fabs are doing just fine!

 

[tamalero]

Don’t think it was greed but lack of vision. An inability to adapt and failure to separate foundry from retail business. Especially in a diversified IC ecosystem and shrinking x86 hegemony. Complacency rather than greed. It happens look at IBM and others … it’s hard to stay at the top.

really guys?
trying to milk a single process and stagnating advancement for almost a decade is "lack of vision"?
They outright tried to ride the wave their best they could.
That is GREED.

 

[acadia11]

That and it is hard to predict the future then mold your business to it. Sometimes things just won't work. Like Windows not wanting to do x86 phones, or people not wanting Optane. But not being able to keep up with the combination of TSMC and their customers without adequate investments should have been foreseeable.

Yeah but windows not wanting to do x86 phones, had more to do with x86 as an architecture is power intensive compared to risc designs and that windows in its evolution doesn’t work in mobile world. Using your finger isn’t the same as a mouse on 3 inch screen. mS tried and it took Apple to get that part right , they brought that capacitive finger touch lcd technology though even themselves from a small startup but they had the foresight to see the possibility … irony of the day the company that powered this simple idea no one was interested in them 1999,2000 …. Go figure something we take for granted today.

Which brings back to your point hard to predict the future, and even when you know what it will be you don’t know what it will look like.

 

[acadia11]

really guys?
trying to milk a single process and stagnating advancement for almost a decade is "lack of vision"?
They outright tried to ride the wave their best they could.
That is GREED.

Not what happened but ok. Intel was predicated on highly integrated in-house chip design and their manufacturing peocess node. As dies shrink it becomes hugely expensive to get to the next process node … Intel had delays in 14nm, 10nm and 7nm, Intel also is its only customer …. Because of that they spend a lot money creating nodes and essentially throw them away far too quickly to recoup that investment, it benefits them to stay longer on a node but hurt their vision … it’s this coupling of node and chip that makes it costly because they have no other real customers to recoup their investment. So, I do agree their chips are costly but that had little to do with what really hurt them ,,, it’s how their business was setup in retail and foundry that caused their biggest concerns.

 

[thestryker]

Don’t think it was greed but lack of vision.

It was actually greed combined with the way the company is structured. The suits at the top did not want to spend the money on EUV machines, but wanted to match the output they could have in a similar node. Technically speaking what they wanted to do was possible, but they'd already had delays with 14nm so it should have been obvious this wasn't going to be smooth sailing. There was no backup plan either because Intel used proprietary tools for fabrication which meant architectures were tied to nodes (this was true until MTL).

As far as the company structure problem the way that Intel historically did fabs was move everything to a new node, use the old node for other services and then retire when spinning up the next. Doing the same thing with the EUV transition would have been extremely expensive because it would have meant a fab with zero output. This is why the suits wanted to avoid EUV as long as possible lest they lose those bonuses from Intel effectively printing money by existing.

By the time EUV rolled around Intel was in a pinch trying to get enough capacity, and still failed to meet MTL demand which hurt margins on that because of the rush to get machines in place. Now all of their current EUV output is GNR, SRF and MTL (and MTL node shrink edition) until the 18A fab is in volume production (which should be soon). The second 18A fab is not online yet, but supposedly will be some time this year. Given that it's a safe bet some amount of NVL is going to be made with TSMC N2 it seems Intel still has capacity problems. Now they're laying off people across the foundry services that indicates that they're going to be depreciating rather than upgrading some amount of their fabs.

All of these issues can be traced back to the decision to not buy EUV when they should have.

 

[Steve Nord_]

I wish I knew which 6 research engineering universities Intel most resembles in periodic brain drains. T.U. Geneva and Delft, Arizona State U., Oregon State U. ..., Saskatchewan U.? Maybe they'll always interview with pointy-haired-boss Zoom backgrounds, or unionize and crack out collateral Idaho or Montana Van der walls semiconductor fab and ioring/packaging concerns. (Mocha breweries, human×wind powered flight infrastructure, green mining, etc.)

 

[acadia11]

It was actually greed combined with the way the company is structured. The suits at the top did not want to spend the money on EUV machines, but wanted to match the output they could have in a similar node. Technically speaking what they wanted to do was possible, but they'd already had delays with 14nm so it should have been obvious this wasn't going to be smooth sailing. There was no backup plan either because Intel used proprietary tools for fabrication which meant architectures were tied to nodes (this was true until MTL).

As far as the company structure problem the way that Intel historically did fabs was move everything to a new node, use the old node for other services and then retire when spinning up the next. Doing the same thing with the EUV transition would have been extremely expensive because it would have meant a fab with zero output. This is why the suits wanted to avoid EUV as long as possible lest they lose those bonuses from Intel effectively printing money by existing.

By the time EUV rolled around Intel was in a pinch trying to get enough capacity, and still failed to meet MTL demand which hurt margins on that because of the rush to get machines in place. Now all of their current EUV output is GNR, SRF and MTL (and MTL node shrink edition) until the 18A fab is in volume production (which should be soon). The second 18A fab is not online yet, but supposedly will be some time this year. Given that it's a safe bet some amount of NVL is going to be made with TSMC N2 it seems Intel still has capacity problems. Now they're laying off people across the foundry services that indicates that they're going to be depreciating rather than upgrading some amount of their fabs.

All of these issues can be traced back to the decision to not buy EUV when they should have.

I agree the delay in EUV adoption was a serious misstep.l but not that it was greed. And they are paying for this today literally and figuratively. Consider though TSMC is currently delaying High NA EUV adoption? So, was Intels decision as nefarious , ie greed, or simply not seen as necessary at the time similar to TSMC decision today to delay high Na EUV until 2030? And Intel has already adopted the technology?

 

[thisisaname]

It was actually greed combined with the way the company is structured. The suits at the top did not want to spend the money on EUV machines, but wanted to match the output they could have in a similar node. Technically speaking what they wanted to do was possible, but they'd already had delays with 14nm so it should have been obvious this wasn't going to be smooth sailing. There was no backup plan either because Intel used proprietary tools for fabrication which meant architectures were tied to nodes (this was true until MTL).

As far as the company structure problem the way that Intel historically did fabs was move everything to a new node, use the old node for other services and then retire when spinning up the next. Doing the same thing with the EUV transition would have been extremely expensive because it would have meant a fab with zero output. This is why the suits wanted to avoid EUV as long as possible lest they lose those bonuses from Intel effectively printing money by existing.

By the time EUV rolled around Intel was in a pinch trying to get enough capacity, and still failed to meet MTL demand which hurt margins on that because of the rush to get machines in place. Now all of their current EUV output is GNR, SRF and MTL (and MTL node shrink edition) until the 18A fab is in volume production (which should be soon). The second 18A fab is not online yet, but supposedly will be some time this year. Given that it's a safe bet some amount of NVL is going to be made with TSMC N2 it seems Intel still has capacity problems. Now they're laying off people across the foundry services that indicates that they're going to be depreciating rather than upgrading some amount of their fabs.

All of these issues can be traced back to the decision to not buy EUV when they should have.

TSMC did not rush into EUV either and they have not started high-na euv lithography which intel has.

 

[dalek1234]

Intel is fooked

 

[thestryker]

I agree the delay in EUV adoption was a serious misstep.l but not that it was greed.

It was a financially driven decision not a technology based one if that isn't greed I don't know what is.

Consider though TSMC is currently delaying High NA EUV adoption?

It's a different situation because unlike the DUV to EUV transition a wall isn't being hit yet and ASML has continued to increase the throughput on their EUV machines. High-NA machines also have different physical fab requirements and TSMC is running full capacity on the fabs that are most likely to be compatible here.

ASML hasn't (at least according to publicly available information) shipped any of the production ready High-NA machines yet and the first deliveries of the EXE:5000s were delayed. Intel's first node that might use High-NA is a 2027 node (originally 18A was supposed to) and they've spoken that it's going to have minimal usage.

TSMC has already ordered (may even have installed) at least one High-NA machine for R&D purposes. Given that everything we currently know indicates High-NA is being used to cut down on multipatterning rather than as the core of manufacturing this choice doesn't have obvious negative consequences.

TSMC did not rush into EUV either and they have not started high-na euv lithography which intel has.

TSMC bought into EUV early and were getting around half of all the machines being built for the first handful of years. N7 was developed with EUV in mind and the first revision to the node shifted from DUV multipatterning over to EUV and it has been used since.

 

[Stomx]

How Intel missed also EUV revolution is beyond me, it looks like an impossible absurd. The fact that EUV and XUV are the future was clear already in the 1980th. It was Intel who pioneered starting from year 2000 the broad research in this area and held numerous conferences and technical meetings I also participated where we had personal talks with their management promoting EUV. Intel management has keynote talks on these conferences...

But then it betrayed the approach in favor of multipatterning.

 

[joeer77]

Intel does have one of ASML's first high NA EUV tools. $500 million dollar price tag. It was in the Oregonian.

Agree they took too long to adopt EUV. That was wasn't Gelsinger's call but was his predecessor. Intel 1276/Intel 4 was first EUV node ($100 million dollar tool). Intel chose to stick with litho etch litho etch (LELE), self align double patterning (SADP) and self aligned quadruple patterning (SAQP) for a long time as a EUV work around. That was a fail. When pattern dimensions are smaller than 185nm UV wavelength or immersion UV, you have to to go to smaller wavelength (EUV). TSMC figured it out early and has been running for several nodes now.

 

[acadia11]

It was a financially driven decision not a technology based one if that isn't greed I don't know what is.

It's a different situation because unlike the DUV to EUV transition a wall isn't being hit yet and ASML has continued to increase the throughput on their EUV machines. High-NA machines also have different physical fab requirements and TSMC is running full capacity on the fabs that are most likely to be compatible here.

ASML hasn't (at least according to publicly available information) shipped any of the production ready High-NA machines yet and the first deliveries of the EXE:5000s were delayed. Intel's first node that might use High-NA is a 2027 node (originally 18A was supposed to) and they've spoken that it's going to have minimal usage.

TSMC has already ordered (may even have installed) at least one High-NA machine for R&D purposes. Given that everything we currently know indicates High-NA is being used to cut down on multipatterning rather than as the core of manufacturing this choice doesn't have obvious negative consequences.

TSMC bought into EUV early and were getting around half of all the machines being built for the first handful of years. N7 was developed with EUV in mind and the first revision to the node shifted from DUV multipatterning over to EUV and it has been used since.

I believe TSMC and Intel received High NA tools last year, Intel plans to be online with them for volume production with 14A, TSMC timeline is about 5 years.

Always the engineers in the firing line while the useless upper management continue to thrive and get obscene paychecks while running the company into the ground. Tan has already proven to be a bad choice and a liar. This is the same clown that railed against Gelsinger sacking engineers not middle-management.

Sack the entire board and CEO!

Always the engineers in the firing line while the useless upper management continue to thrive and get obscene paychecks while running the company into the ground. Tan has already proven to be a bad choice and a liar. This is the same clown that railed against Gelsinger sacking engineers not middle-management.

Sack the entire board and CEO!

Agree they need a cultural makeover. The fact that their CEO hire wasn’t even creative shows this board isn’t up to task. Atleast Gelsinger had a plan good or bad it was a direction. When your only answer is layoffs without strategy or plan shows you lack the creative mindset necessary for longterm vision , you are a game manager not a game changer. Great CEOs are game changers.

 

[acadia11]

Intel does have one of ASML's first high NA EUV tools. $500 million dollar price tag. It was in the Oregonian.

Agree they took too long to adopt EUV. That was wasn't Gelsinger's call but was his predecessor. Intel 1276/Intel 4 was first EUV node ($100 million dollar tool). Intel chose to stick with litho etch litho etch (LELE), self align double patterning (SADP) and self aligned quadruple patterning (SAQP) for a long time as a EUV work around. That was a fail. When pattern dimensions are smaller than 185nm UV wavelength or immersion UV, you have to to go to smaller wavelength (EUV). TSMC figured it out early and has been running for several nodes now.

Not just one of their first it was their first high NA delivery. They should be the first to have high volume high NA EUV production.

 

[thestryker]

I believe TSMC and Intel received High NA tools last year, Intel plans to be online with them for volume production with 14A, TSMC timeline is about 5 years.

Intel has two installed and running in Oregon, but none of the production models have shipped yet. They're also only planning on using it to limited degree on 14A and have floated not using it at all. While this could be a money saving strategy ASML has also been late with High-NA.

 

[acadia11]

Intel has two installed and running in Oregon, but none of the production models have shipped yet. They're also only planning on using it to limited degree on 14A and have floated not using it at all. While this could be a money saving strategy ASML has also been late with High-NA.

Not sure TSMC is late rather they believe current EUV capabilities are sufficient for their market needs , as I understand they see 5 year timeline for testing of their machines and readiness for volume production and Intel was targeting 27 , 28?