Intel faces pricing dilemma from Dell

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

keith wrote:

>Transistors are free. Figuring out what to do with them isn't. Expect
>more of the same thing (we've seen large caches, now we see multiple cores
>- all very predictable).

I think that (commodity) dual cores were "predictable" about as much
as the (lack of) performance and the (excess of) power dissipation
issues that we (or at least Intel) have suddenly run-into were
"predictable". As it seems that many were caught by surprise by the
rather sudden appearance of these major difficulties, they obviously
weren't predictable to everyone...

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

"Robert Redelmeier" <redelm@ev1.net.invalid> wrote in message
news:V6l6e.499$VA3.226@newssvr30.news.prodigy.com...
> In comp.sys.ibm.pc.hardware.chips Hank Oredson <horedson@earthlink.net>
> wrote:
>> P6 feels like a big iron flathead six, Pentium 4 like a
>> light aluminum V8. (For the Brits: "aluminium").
>
> Not quite. don't confuse clock with work per clock.

Wasn't ... in fact wasn't thinking about anything but the
sound the fan makes 🙂

> A P6 or K7 is more like a modern V6 while the Pentium 4 is like
> a 4 cylinder that someone has revved to 10,000 rpm. They're both
> powerful, but how they achieve it is very different.

Yes, quite aware of the difference.

--

... Hank

http://home.earthlink.net/~horedson
http://home.earthlink.net/~w0rli

>
> -- Robert
>

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

Bitstring <0q2l51dcukecpdd7ggo40nssp96gjk6i9r@4ax.com>, from the
wonderful person chrisv <chrisv@nospam.invalid> said
>keith wrote:
>
>>Transistors are free. Figuring out what to do with them isn't. Expect
>>more of the same thing (we've seen large caches, now we see multiple cores
>>- all very predictable).
>
>I think that (commodity) dual cores were "predictable" about as much
>as the (lack of) performance and the (excess of) power dissipation
>issues that we (or at least Intel) have suddenly run-into were
>"predictable".

I think dual cores were much more predictable than that .. I've been
waiting for the damn things to appear ever since the x87 FPUs were
slurped up inside the CPU (i.e. a LONG time). I was surprised that AMD
put the memory controller on chip, but not that they (finally) came out
with the 'server on silicon' dual CPU. I'd be faintly surprised if they
go past 4x or 8x though .. anything seriously parallel is seriously hard
to program well.

--
GSV Three Minds in a Can
SC recommends the use of Firefox; Get smart, or get assimilated.

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

"chrisv" <chrisv@nospam.invalid> wrote in message
news:0q2l51dcukecpdd7ggo40nssp96gjk6i9r@4ax.com...
> keith wrote:
>
> >Transistors are free. Figuring out what to do with them isn't.
Expect
> >more of the same thing (we've seen large caches, now we see
multiple cores
> >- all very predictable).
>
> I think that (commodity) dual cores were "predictable" about as much
> as the (lack of) performance and the (excess of) power dissipation
> issues that we (or at least Intel) have suddenly run-into were
> "predictable". As it seems that many were caught by surprise by the
> rather sudden appearance of these major difficulties, they obviously
> weren't predictable to everyone...

They sure as hell weren't predictable to me, Chris. ;-(

And I was a well-experienced electronic design engineer when Intel
introduced this thing called a 4004. ;-)

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

On Mon, 11 Apr 2005 21:40:10 GMT, "Felger Carbon" <fmsfnf@jfoops.net>
wrote:

>"chrisv" <chrisv@nospam.invalid> wrote in message
>news:0q2l51dcukecpdd7ggo40nssp96gjk6i9r@4ax.com...
>> keith wrote:
>>
>> >Transistors are free. Figuring out what to do with them isn't.
>Expect
>> >more of the same thing (we've seen large caches, now we see
>multiple cores
>> >- all very predictable).
>>
>> I think that (commodity) dual cores were "predictable" about as much
>> as the (lack of) performance and the (excess of) power dissipation
>> issues that we (or at least Intel) have suddenly run-into were
>> "predictable". As it seems that many were caught by surprise by the
>> rather sudden appearance of these major difficulties, they obviously
>> weren't predictable to everyone...
>
>They sure as hell weren't predictable to me, Chris. ;-(
>
>And I was a well-experienced electronic design engineer when Intel
>introduced this thing called a 4004. ;-)
>

David Patterson has papers now nearly a decade old talking about
reaching a point of diminishing returns in more and more transistors
committed to a single core, with the obvious path being multiple cores
on a single die. That's different from the power dissipation problem,
of course, but multiple cores should have been forseeable, if the
exact timing wasn't.

RM

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

On Mon, 11 Apr 2005 18:44:02 -0400, Robert Myers <rmyers1400@comcast.net>
wrote:

>On Mon, 11 Apr 2005 21:40:10 GMT, "Felger Carbon" <fmsfnf@jfoops.net>
>wrote:
>
>>"chrisv" <chrisv@nospam.invalid> wrote in message
>>news:0q2l51dcukecpdd7ggo40nssp96gjk6i9r@4ax.com...
>>> keith wrote:
>>>
>>> >Transistors are free. Figuring out what to do with them isn't.
>>Expect
>>> >more of the same thing (we've seen large caches, now we see
>>multiple cores
>>> >- all very predictable).
>>>
>>> I think that (commodity) dual cores were "predictable" about as much
>>> as the (lack of) performance and the (excess of) power dissipation
>>> issues that we (or at least Intel) have suddenly run-into were
>>> "predictable". As it seems that many were caught by surprise by the
>>> rather sudden appearance of these major difficulties, they obviously
>>> weren't predictable to everyone...
>>
>>They sure as hell weren't predictable to me, Chris. ;-(
>>
>>And I was a well-experienced electronic design engineer when Intel
>>introduced this thing called a 4004. ;-)
>>
>
>David Patterson has papers now nearly a decade old talking about
>reaching a point of diminishing returns in more and more transistors
>committed to a single core, with the obvious path being multiple cores
>on a single die. That's different from the power dissipation problem,
>of course, but multiple cores should have been forseeable, if the
>exact timing wasn't.

Of course, Intel is much more affected by the current clock ceiling than
AMD. In fact AMD has quite a ways to go on clock speeds and they have the
power management in place well before they go there. Cool 'n' Quiet is
really quite amazing in its effect on CPU temp; SpeedStep may be just as
good but I haven;t seen a system yet which allows you to observe what's
going on.

--
Rgds, George Macdonald

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

Robert Myers wrote:

>David Patterson has papers now nearly a decade old talking about
>reaching a point of diminishing returns in more and more transistors
>committed to a single core, with the obvious path being multiple cores
>on a single die. That's different from the power dissipation problem,
>of course, but multiple cores should have been forseeable, if the
>exact timing wasn't.

Of course, a big factor is what the market decides is the "right
price" for a CPU. As long as people think it's okay to spend $200 or
more on one chip (a large fraction of the entire system's price),
there's going to be the economics to produce "exotic" CPU's.

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

GSV Three Minds in a Can wrote:

>I think dual cores were much more predictable than that .. I've been
>waiting for the damn things to appear ever since the x87 FPUs were
>slurped up inside the CPU (i.e. a LONG time).

Well, if the price/perfomance of single-core CPU's could continue to
scale as well as they've done in the past, I think you'd be waiting a
lot longer yet. It would be cheaper for them to just throw more MHz
at the problem, which, for normal desktop PC's, isn't a bad way to go,
IMO (note this not an endorsement of the silly P4 design).

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

In article <0q2l51dcukecpdd7ggo40nssp96gjk6i9r@4ax.com>,
chrisv@nospam.invalid says...
> keith wrote:
>
> >Transistors are free. Figuring out what to do with them isn't. Expect
> >more of the same thing (we've seen large caches, now we see multiple cores
> >- all very predictable).
>
> I think that (commodity) dual cores were "predictable" about as much
> as the (lack of) performance and the (excess of) power dissipation
> issues that we (or at least Intel) have suddenly run-into were
> "predictable".

Ok, both were predictable (and predicted). ;-)

> As it seems that many were caught by surprise by the
> rather sudden appearance of these major difficulties, they obviously
> weren't predictable to everyone...

The "problems" seen at 90nm were not due so much to power dissipation.
That issue was well known for some time. Everyone knew that at 90nm
things were going to cook, unless the voltage could be cranked way
down. If anything, the problem (with power) was that the voltage
couldn't be scaled back as much as wanted and still have any kind of
increase in performance.

--
Keith

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

In article <jkln51hg08nci2ge45e35b72gftu3bkaru@4ax.com>,
chrisv@nospam.invalid says...
> GSV Three Minds in a Can wrote:
>
> >I think dual cores were much more predictable than that .. I've been
> >waiting for the damn things to appear ever since the x87 FPUs were
> >slurped up inside the CPU (i.e. a LONG time).
>
> Well, if the price/perfomance of single-core CPU's could continue to
> scale as well as they've done in the past, I think you'd be waiting a
> lot longer yet.

But we *knew* that that wasn't going to happen. Why do you think we
started seeing integrat4ed L2s? It was something to do with
transistors that pushed the curve out a generation or two. Caches only
solve so many ills though.

> It would be cheaper for them to just throw more MHz
> at the problem, which, for normal desktop PC's, isn't a bad way to go,
> IMO (note this not an endorsement of the silly P4 design).

Ok, how do you "just throw more MHz" at the problem. Remember, the
memory interface is the same. More MHz may not give much benefit, even
were it a "just".

--
Keith

 

[Guest]

Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

In article <_8C6e.4354$yq6.1293@newsread3.news.pas.earthlink.net>,
fmsfnf@jfoops.net says...
> "chrisv" <chrisv@nospam.invalid> wrote in message
> news:0q2l51dcukecpdd7ggo40nssp96gjk6i9r@4ax.com...
> > keith wrote:
> >
> > >Transistors are free. Figuring out what to do with them isn't.
> Expect
> > >more of the same thing (we've seen large caches, now we see
> multiple cores
> > >- all very predictable).
> >
> > I think that (commodity) dual cores were "predictable" about as much
> > as the (lack of) performance and the (excess of) power dissipation
> > issues that we (or at least Intel) have suddenly run-into were
> > "predictable". As it seems that many were caught by surprise by the
> > rather sudden appearance of these major difficulties, they obviously
> > weren't predictable to everyone...
>
> They sure as hell weren't predictable to me, Chris. ;-(


I told you that I saw multi-core chips coming at least six years ago.
I don't remember if I made those predictions on the NG though.

> And I was a well-experienced electronic design engineer when Intel
> introduced this thing called a 4004. ;-)

No, I didn't predict multi-core microprocessors in '70 either. ;-)

--
Keith

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

On Fri, 08 Apr 2005 15:44:35 GMT, Robert Redelmeier <redelm@ev1.net.invalid>
wrote:

>In comp.sys.ibm.pc.hardware.chips Robert Myers <rmyers1400@comcast.net> wrote:
>> The question isn't how *I* use computers. The question is
>> how a typical user uses computers. The typical user will
>> buy more just as people bought more horsepower because
>> more is obviously always better? To some extent, yes.
>> But do take a look at the automobile industry.
>
>OK. With SMP or dual cores, the closest analogy is a car with
>two engines. I don't know of any, but people often want more
>powerful engines than they really need or often use.
>

Somewhat off topic, but relevant as analogy:

http://www.eliica.com/

To me it seems analogous to an 8-CPU server set up for gaming. (Zero to
60 in four seconds!)

>I'm a fan of SMP (and by extention dual cores), but I really
>don't think they're much good for most users who use a computer
>in a single-threaded fashion. Yes, there's an obnoxious pile
>of system processes, but most of these should be blocked and
>not eat up enough of the CPU that the user notice. If they
>do, then the problem is with these processes which no longer
>meet the defintion of "background".
>
>Most users will be much happier with double clockspeed rather
>than two CPUs. Not so servers where the inherent heavy
>multithreading and high interrupt load makes SMP attractive
>to the point to being required.
>
>-- Robert
>

I tend to agree with that -- but only for the present, when most users do
e-mail, word processing, a little photo-editing (probably with Elements or
PSPro), some Web surfing and video watching.

I think that when most users want to be able to do the "normal" things
with their PCs (e-mail, spreadsheets, etc.) while composing or editing a
video presentation, SMP will become a standard feature.

Perhaps a better analogy is skyscrapers. Adding more stories (CPU speed)
is becoming prohibitive for both technical and economic reasons. The obvious
answer is "SMB" -- side-by-side multiple buildings. ;-)

Chris

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

On Tue, 19 Apr 2005 23:05:14 GMT, Christopher P. Winter
<chrisw20@chrisw20.best.vwh.net> wrote:

>On Fri, 08 Apr 2005 15:44:35 GMT, Robert Redelmeier <redelm@ev1.net.invalid>
>wrote:

>>I'm a fan of SMP (and by extention dual cores), but I really
>>don't think they're much good for most users who use a computer
>>in a single-threaded fashion. Yes, there's an obnoxious pile
>>of system processes, but most of these should be blocked and
>>not eat up enough of the CPU that the user notice. If they
>>do, then the problem is with these processes which no longer
>>meet the defintion of "background".
>>
>>Most users will be much happier with double clockspeed rather
>>than two CPUs. Not so servers where the inherent heavy
>>multithreading and high interrupt load makes SMP attractive
>>to the point to being required.
>>
>>-- Robert
>>
>
> I tend to agree with that -- but only for the present, when most users do
>e-mail, word processing, a little photo-editing (probably with Elements or
>PSPro), some Web surfing and video watching.

While there are a very few activities which are helped by multiple CPUs, I
don't see that I can do any two of the above-mentioned simultaneously.

> I think that when most users want to be able to do the "normal" things
>with their PCs (e-mail, spreadsheets, etc.) while composing or editing a
>video presentation, SMP will become a standard feature.

Again what two do you propose do do simultaneously? E.g., if I'm writing
an e-mail I can't edit a video presentation at the same time. Maybe if I
have some heavy-duty encoding or decoding app, which is basically running
in batch-mode, I'd like to do something interactively without having to
wait for time slices.

--
Rgds, George Macdonald

 

[keith]

Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

On Wed, 20 Apr 2005 08:51:40 -0400, George Macdonald wrote:

> On Tue, 19 Apr 2005 23:05:14 GMT, Christopher P. Winter
> <chrisw20@chrisw20.best.vwh.net> wrote:
>
>>On Fri, 08 Apr 2005 15:44:35 GMT, Robert Redelmeier <redelm@ev1.net.invalid>
>>wrote:
>
>>>I'm a fan of SMP (and by extention dual cores), but I really
>>>don't think they're much good for most users who use a computer
>>>in a single-threaded fashion. Yes, there's an obnoxious pile
>>>of system processes, but most of these should be blocked and
>>>not eat up enough of the CPU that the user notice. If they
>>>do, then the problem is with these processes which no longer
>>>meet the defintion of "background".
>>>
>>>Most users will be much happier with double clockspeed rather
>>>than two CPUs. Not so servers where the inherent heavy
>>>multithreading and high interrupt load makes SMP attractive
>>>to the point to being required.
>>>
>>>-- Robert
>>>
>>
>> I tend to agree with that -- but only for the present, when most users do
>>e-mail, word processing, a little photo-editing (probably with Elements or
>>PSPro), some Web surfing and video watching.
>
> While there are a very few activities which are helped by multiple CPUs, I
> don't see that I can do any two of the above-mentioned simultaneously.

Rendering video while surfing? I'm sure photoshop can use multiple CPUs.

>> I think that when most users want to be able to do the "normal"
>> things
>>with their PCs (e-mail, spreadsheets, etc.) while composing or editing a
>>video presentation, SMP will become a standard feature.
>
> Again what two do you propose do do simultaneously?

You're arguing against multi-tasking. Many Win-nuts told OS/2 users that
multi-tasking wasn't necessary too (primarily because Woin couldn't
multi-task).

> E.g., if I'm
> writing an e-mail I can't edit a video presentation at the same time.
> Maybe if I have some heavy-duty encoding or decoding app, which is
> basically running in batch-mode, I'd like to do something interactively
> without having to wait for time slices.

How about simulated anealing while reading .chips? ;-) Of course when I
was doing such things I simply offloaded it to another system and kept
surfing. ;-)

--
Keith

 

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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

On Thu, 21 Apr 2005 22:27:33 -0400, keith <krw@att.bizzzz> wrote:

>On Wed, 20 Apr 2005 08:51:40 -0400, George Macdonald wrote:
>
>> On Tue, 19 Apr 2005 23:05:14 GMT, Christopher P. Winter
>> <chrisw20@chrisw20.best.vwh.net> wrote:
>>
>>>On Fri, 08 Apr 2005 15:44:35 GMT, Robert Redelmeier <redelm@ev1.net.invalid>
>>>wrote:
>>
>>>>I'm a fan of SMP (and by extention dual cores), but I really
>>>>don't think they're much good for most users who use a computer
>>>>in a single-threaded fashion. Yes, there's an obnoxious pile
>>>>of system processes, but most of these should be blocked and
>>>>not eat up enough of the CPU that the user notice. If they
>>>>do, then the problem is with these processes which no longer
>>>>meet the defintion of "background".
>>>>
>>>>Most users will be much happier with double clockspeed rather
>>>>than two CPUs. Not so servers where the inherent heavy
>>>>multithreading and high interrupt load makes SMP attractive
>>>>to the point to being required.
>>>>
>>>>-- Robert
>>>>
>>>
>>> I tend to agree with that -- but only for the present, when most users do
>>>e-mail, word processing, a little photo-editing (probably with Elements or
>>>PSPro), some Web surfing and video watching.
>>
>> While there are a very few activities which are helped by multiple CPUs, I
>> don't see that I can do any two of the above-mentioned simultaneously.
>
>Rendering video while surfing? I'm sure photoshop can use multiple CPUs.

In that case you don't need a 2nd user process running to benefit... one of
the "few".

>>> I think that when most users want to be able to do the "normal"
>>> things
>>>with their PCs (e-mail, spreadsheets, etc.) while composing or editing a
>>>video presentation, SMP will become a standard feature.
>>
>> Again what two do you propose do do simultaneously?
>
>You're arguing against multi-tasking. Many Win-nuts told OS/2 users that
>multi-tasking wasn't necessary too (primarily because Woin couldn't
>multi-task).

No, I'm not arguing against it - all I'm saying it ain't gonna help you to
do e-mail, word processing, composing and Web surfing, or any other
interactive task at the same time... at least it doesn't with my coarse
grain, time-sliced brain and one keyboard.🙂

>> E.g., if I'm
>> writing an e-mail I can't edit a video presentation at the same time.
>> Maybe if I have some heavy-duty encoding or decoding app, which is
>> basically running in batch-mode, I'd like to do something interactively
>> without having to wait for time slices.
>
>How about simulated anealing while reading .chips? ;-) Of course when I
>was doing such things I simply offloaded it to another system and kept
>surfing. ;-)

Sure, that's a heavy duty quasi-batch process - . Hmmm, I thought
simulated annealing had gone out of favor recently.

--
Rgds, George Macdonald

 

[keith]

Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?)

On Fri, 22 Apr 2005 13:51:37 -0400, George Macdonald wrote:

> On Thu, 21 Apr 2005 22:27:33 -0400, keith <krw@att.bizzzz> wrote:
>
>>On Wed, 20 Apr 2005 08:51:40 -0400, George Macdonald wrote:
>>
>>> On Tue, 19 Apr 2005 23:05:14 GMT, Christopher P. Winter
>>> <chrisw20@chrisw20.best.vwh.net> wrote:
>>>
>>>>On Fri, 08 Apr 2005 15:44:35 GMT, Robert Redelmeier <redelm@ev1.net.invalid>
>>>>wrote:
>>>
>>>>>I'm a fan of SMP (and by extention dual cores), but I really
>>>>>don't think they're much good for most users who use a computer
>>>>>in a single-threaded fashion. Yes, there's an obnoxious pile
>>>>>of system processes, but most of these should be blocked and
>>>>>not eat up enough of the CPU that the user notice. If they
>>>>>do, then the problem is with these processes which no longer
>>>>>meet the defintion of "background".
>>>>>
>>>>>Most users will be much happier with double clockspeed rather
>>>>>than two CPUs. Not so servers where the inherent heavy
>>>>>multithreading and high interrupt load makes SMP attractive
>>>>>to the point to being required.
>>>>>
>>>>>-- Robert
>>>>>
>>>>
>>>> I tend to agree with that -- but only for the present, when most users do
>>>>e-mail, word processing, a little photo-editing (probably with Elements or
>>>>PSPro), some Web surfing and video watching.
>>>
>>> While there are a very few activities which are helped by multiple CPUs, I
>>> don't see that I can do any two of the above-mentioned simultaneously.
>>
>>Rendering video while surfing? I'm sure photoshop can use multiple CPUs.
>
> In that case you don't need a 2nd user process running to benefit... one of
> the "few".

Sure, but it's an activity that can benefit from multiple CPUs. As I
indicated, I used to do it (still do to a point) with multiple *systems*,
but a single system has its benefits too (though I don't see dual-CPU
laptops on the near horizon ;-).

>>>> I think that when most users want to be able to do the "normal"
>>>> things
>>>>with their PCs (e-mail, spreadsheets, etc.) while composing or editing
>>>>a video presentation, SMP will become a standard feature.
>>>
>>> Again what two do you propose do do simultaneously?
>>
>>You're arguing against multi-tasking. Many Win-nuts told OS/2 users
>>that multi-tasking wasn't necessary too (primarily because Woin couldn't
>>multi-task).
>
> No, I'm not arguing against it - all I'm saying it ain't gonna help you
> to do e-mail, word processing, composing and Web surfing, or any other
> interactive task at the same time... at least it doesn't with my coarse
> grain, time-sliced brain and one keyboard.🙂

It helps you do those things if you have a CPU hog process running as well.

>>> E.g., if I'm
>>> writing an e-mail I can't edit a video presentation at the same time.
>>> Maybe if I have some heavy-duty encoding or decoding app, which is
>>> basically running in batch-mode, I'd like to do something
>>> interactively without having to wait for time slices.
>>
>>How about simulated anealing while reading .chips? ;-) Of course when
>>I was doing such things I simply offloaded it to another system and kept
>>surfing. ;-)
>
> Sure, that's a heavy duty quasi-batch process - . Hmmm, I thought
> simulated annealing had gone out of favor recently.

The place-n-route algorithms used for FPGAs at least were SA. I did use
the past tense. ;-) I haven't looked recently though.

--
Keith