Traditionally, a new node would represent a doubling in the transistor density. That would traditionally be achieved by shrinking the half-pitch of the planar transistor to around 70% of the previous node’s half pitch. When the move to FinFETs was made and with Intel being the first to do so, their idea (Intel’s idea) was for the nm scale to continue by way of equivalency in transistor density, i.e. the density that would be equivalent to that achieved by a hypothetical planar transistor whose half-pitch size would be what the process node would be marketed as. It is not the first time such an equivalency would be made in technology history. For example, the concept of the horsepower was invented to compare the output of steam engines with the power of draft horses and despite today not using horses for transportation or work we are still using the horsepower unit.I agree that transistor naming already sucks.
But, I very strongly disagree that renaming the process "brings it more into line with what they really are".
That's the big lie here. That's what is upsetting. They are bringing the number further from the truth, and directly telling people that the new number is the "right" one. You say explaining, I say gaslighting.
Taking naming that was already misleading, and throwing it over the cliff of "words no longer have any meaning" is not an improvement.
I'm tired of false advertising. I'm tired of tech companies being able to do and say anything they want, whenever they want.
Computers have been around for over 50 years. It's not acceptable that the courts and consumer advocacy still don't understand them well enough to recognize even the most blatant abuses of customer trust.
However, traditionally, new process nodes didn’t only improve transistor density. They also improved performance per watt by around 20%. When foundries moved to FinFETs they decided to no longer use the doubling of transistor density as their node defining metric but instead use the 20% increase in performance per watt. It still is an equivalency of sorts with planar transistors. It is the performance per watt achieved by a hypothetical planar transistor whose half-pitch size would be what the process node would be marketed as. Of course, performance per watt improvements can be achieved by internode improvements that don’t necessarily increase density. Intel was the last one sticking to its guns and insisting to use the doubling of transistor density as the metric to warrant a new node name. They kept denoting intranode improvements that would improve performance per watt by the + sign. A move which instead of being applauded for its honesty was laughed at by both the tech press and AMD fanboys.
Anyway, with all foundries adopting the 20% improvement in performance per watt as their node defining metric for several generations now and with Intel getting into the foundry business themselves, Intel finally decided to embrace the foundries’ redefinition of what warrants a new process name and no longer use transistor density. Intel is the last one to blame for this. If you want to blame someone, blame Samsung - they are the worst offenders.