everettfsargent
Honorable
One PCIe 4.0 lane uses less power and die area than two 3.0 ones. Intel may also have more power-efficient PCIe 4.0 PHY/MAC designs than AMD's - Intel has been doing high speed networking for a long time, developed high-speed transceivers for Thunderbolt for a while, acquired a portfolio of multi-gigabit transceivers by buying out Altera and probably a few others. Xilinx which AMD is currently in the process of acquiring likely has better PCIe 4.0/5.0 designs than AMD/TSMC too.
With all that going for IBM, hmm, err, Intel, they should release their own PCIe 4.0 Oplame SSD. As Oplame was so successful and inexpensive. Or maybe use all of those up to four PCIe 4.0 lanes for a discrete GPU from Nvidia, AMD or even Apple. Oh wait, the OEM's make those kind of decisions. All I know is that some OEM will put a somewhat pokey 4.0 SSD (by current theoretical bandwidth standards) into their Tiger Lake laphot, then we will see the actual real world improvements over a fully optimized high throughput bleeding edge 3.0 SSD. Like doing a double blind experiment, which is faster. the 4.0 laphot or the 3.0 laptop. I'm suggesting that if one were to do a true double blind experiment, that the results would NOT be statistically significant or robust (the null hypothesis is that there is no difference so that you need significance or confidence to void or exclude the null). Remember, real world and real normal people as gear heads would just do a throughput test benchmark.