News Intel scraps 18A process for Arrow Lake, goes with 'external nodes' likely TSMC

[Mama Changa]

And why isn't Arrow Lake going to 18A?
Is 18A not proceeding well enough?

18A is for Panther Lake H2 2025. It was never going to be a 2024 node. It is proceeding well as they already have Panther Lake chips up and running. I'm more worried Arrow Lake is not delayed and that they are already stockpiling cpu's as they are getting announced in October.

 

[YSCCC]

I feel Intel’s foundry is going to be running into big problems the rate Intel is “marketing” it. Cancelling the use of their own foundry will raise doubts/ concerns about the quality of the fab. Intel made it sound really easy, let’s do 3nm, than jump to 20A and to 18A each in a year or less. In the end, they did not use Intel 3 and 20A is also vapour ware. Over promise under delivered?

I believe it's more due to it being unrealistically aggressive goals set for their engineering team to meet, now with the massive layoff the already tight hand count drops further isn't going to help.

And not to forget the current Raptor Lake issues tied up quite some of the resources to salvage reputation, they need to act much more promptly for affected users and RMAs, and with excess stocks to replace those RMA chips, all those normally happens in the early life cycle of any new chips, and it breaks in the point where new generation should be arriving and they can steer away the resources for the new stuffs, likely with teething issues.

These make decision of skipping one node to release resources or restructure makes sense in their current situation, but also risks further investment dropping them thus draining up the already drying cash pool, will be a tough age for them to try retain their crown of the biggest and most advanced CPU maker

 

[MXM0]

This article's take on Intel's release makes no sense.

Intel cannot put a backside power design onto a node that's not designed for it. Just can't.

TSMC won't have BSP and GAA until at least 2026 -- that's the whole reason Intel's 20A, 18A, and 14A are exciting.

I think they must be cancelling Arrow Lake altogether, and just going with Nova Lake (Nova Lake is the 18A version of Arrow Lake -- Panther Lake is the 18A version of Lunar Lake, iirc), in 2025, instead.

The only other thing they could do with external fabs would be a die shrink of one of their not-BSP chips, like the i3/5/7/9 14000 series, or a modified Xeon from their Intel 3 node. If they handle the packaging, I suppose they could fit them into the new motherboards? Not sure about that.

 

[thestryker]

This article's take on Intel's release makes no sense.

Intel cannot put a backside power design onto a node that's not designed for it. Just can't.

Both the Lion Cove and Skymont CPU architectures are already on TSMC N3 with LNL so the design work has already been done as far as the cores are concerned.

 

[YSCCC]

This article's take on Intel's release makes no sense.

Intel cannot put a backside power design onto a node that's not designed for it. Just can't.

TSMC won't have BSP and GAA until at least 2026 -- that's the whole reason Intel's 20A, 18A, and 14A are exciting.

I think they must be cancelling Arrow Lake altogether, and just going with Nova Lake (Nova Lake is the 18A version of Arrow Lake -- Panther Lake is the 18A version of Lunar Lake, iirc), in 2025, instead.

The only other thing they could do with external fabs would be a die shrink of one of their not-BSP chips, like the i3/5/7/9 14000 series, or a modified Xeon from their Intel 3 node. If they handle the packaging, I suppose they could fit them into the new motherboards? Not sure about that.

It is possible to tweak a bit on the ARL to make it work for TSMC process, but the real concerning issue is that they seems to struggle a lot on their near term, which definitely won't be a good thing for 1-2gen at least

 

[DavidC1]

Or, more likely they couldn't meet performance and density targets for 18A so they took 20A, added extra libraries and renamed it "18A" also "cancelling" 20A.

Where else did the extra 10% disappear? Also 30% density gain is not exactly fantastic.

TSMC won't have BSP and GAA until at least 2026 -- that's the whole reason Intel's 20A, 18A, and 14A are exciting.

Who cares? TSMC has all the customers, Intel has less than Samsung.

BSP and GAA contribute to get 15% perf and 30% density, the latter of which is needed just to catch up with TSMC's existing N3 process. Also without the extra 10% on the original 18A, they might not even have the performance lead.

For 14A they are saying they are going back to 2 year cadence(meaning 2 years after 18A) and it's a mere 15% perf/20% density improvement. Note that Intel is basically bankrupting themselves achieving this middling gain.

Continuing the post-2005 Moore's Law tradition of needing much more work for much less gains.

 

[Root Canal]

First, I don't know whether to trust Intel about the health 18A. This doesn't align with what Broadcom has said about it, but I also don't put much heed in that leak.

Maybe Broadcom is disappointed with performance/power/density of 18A, not the yield..?

 

[TheSecondPower]

Or, more likely they couldn't meet performance and density targets for 18A so they took 20A, added extra libraries and renamed it "18A" also "cancelling" 20A.

I think 20A and 18A are more less the same node. Once upon a time they'd have been called 20A and 20A+. Or from another point of view, 20A is 18A but without high density libraries or low-leakage optimizations, things Intel's CPU cores can do well without, so it's an early release of 18A that can only be used for CPU tiles. Intel 4 was the same thing to Intel 3.

 

[YSCCC]

I think 20A and 18A are more less the same node. Once upon a time they'd have been called 20A and 20A+. Or from another point of view, 20A is 18A but without high density libraries or low-leakage optimizations, things Intel's CPU cores can do well without, so it's an early release of 18A that can only be used for CPU tiles. Intel 4 was the same thing to Intel 3.

It is indeed annoying that “recent” processes do not reflect the real size anymore due to physics constrain. But what I have a feel is that since we are trying to squeeze the final drops of shrinkage to defeat laws of physics, it gets ever easier to get into reliability issues with effects one didn’t think of. And the performance gain per dollar cost is getting more stupid everyday

 

[netrox]

Why is intel so bad? Apple literally ditched intel because of intel’s delays.

 

[bit_user]

Apple literally ditched intel because of intel’s delays.

No, I think they had plans to move away from Intel going back more than a decade.

An update on Apple moving away from Intel

There were a lot of incredulous and dismissive comments when SemiAccurate said that Apple would be going Intel free in the next few years.

www.semiaccurate.com

 

[emv]

There's only one of two logical conclusions that one can make from what I understand:

1) 20A yields were too low for volume production making external the way to go because TSMC isn't cheap (I'm assuming the compute tiles are going to be N3 like LNL).

2) Intel doesn't want to tie up their limited EUV machines on 20A for the next 3-5 years to meet manufacturing requirements since it's an internal only node.

Problems with 20A would certainly mean bad tidings for the near term and 18A. It might also speak to some teething issues with GAAFET. Without internal information I highly doubt there will be any way to confirm if there are issues.

It's also believable that they'd want to prioritize the node that is open to external customers. The MTL rollout cost them a lot of money and may very well have impacted how quickly Intel 3 capacity rolled out. I hope that this is the driver rather than problems with the nodes as it's the much better of the options I can come up with.

If only someone had known about this before LOL. this was decided in February and I announced it here last month

You should listen more to people who know what is going on.

If you want to know exactly why and how this happened, let me know. I will send you a message

 

[kerberos_20]

And why isn't Arrow Lake going to 18A?
Is 18A not proceeding well enough?

ye, its not proceeding well enough, broadcom did recently sample on 18A and it failed..so not ready (yet)

 

[JamesJones44]

ye, its not proceeding well enough, broadcom did recently sample on 18A and it failed..so not ready (yet)

It didn't fail officially. It's rumored that Broadcom is unhappy, Broadcom's official comment was that their evaluation is not complete.

These things tend to end up being true, but just wanted to point out that it's not a confirmed claim.

https://www.reuters.com/technology/intel-manufacturing-business-suffers-setback-broadcom-tests-disappoint-sources-2024-09-04/

 

[YSCCC]

It didn't fail officially. It's rumored that Broadcom is unhappy, Broadcom's official comment was that their evaluation is not complete.

These things tend to end up being true, but just wanted to point out that it's not a confirmed claim.

https://www.reuters.com/technology/intel-manufacturing-business-suffers-setback-broadcom-tests-disappoint-sources-2024-09-04/

It's bad enough when big coporates come out and do such negative press, usually it means it's quite far from their original expectation

 

[Kamen Rider Blade]

First, I don't know whether to trust Intel about the health 18A. This doesn't align with what Broadcom has said about it, but I also don't put much heed in that leak. They've said lots of positive things, like about Meteor Lake, only then to go on and cancel the desktop product.

This is too late for them to cancel 20A because they "don't need it". Like, at least 6 months too late. Delays in Arrow Lake could be very costly for them, especially if they miss at least part of the holiday shopping season.

A further argument against it "saving money" is that their margins will be reduced by going with TSMC. Again, this is too late in the game to kill it just for financial reasons (i.e. after they spent so much to get it to this point). There must be some other reason.

Finally, we don't know whether the version using TSMC will be better or not. Maybe that's what ultimately killed it. If the compute die on 20A underperformed the TSMC N3B die from Lunar Lake, it could've been the final nail in the coffin.

I'd trust Broadcom's word over the quality of their node over Intel's marketing.

If they say the defect density/rate isn't good enough for HVM (High Volume Manufacturing), I'll believe them over Intel at this point.

 

[RUSerious]

I'd trust Broadcom's word over the quality of their node over Intel's marketing.

If they say the defect density/rate isn't good enough for HVM (High Volume Manufacturing), I'll believe them over Intel at this point.

But, you trust 'sources' in a news article? I don't trust Intel marketing, because it's almost always spin, but I don't think we know with any certainty, what really happened with Broadcom's pre-production runs.

 

[Kamen Rider Blade]

But, you trust 'sources' in a news article? I don't trust Intel marketing, because it's almost always spin, but I don't think we know with any certainty, what really happened with Broadcom's pre-production runs.

They claimed the defect density was too high for their standards, it needs more time to refine the process until defect density is "Good Enough" for HVM.

Broadcom reportedly disappointed with Intel 18A process technology — spokesperson confirms evaluation is still in process

According to Reuters, Intel’s ambitions to become the world’s second-largest contract chipmaker by 2030 seem to have encountered a major hurdle after Broadcom’s trial runs using Intel’s 18A fabrication technology did not purportedly meet expectations. This setback adds pressure to Intel’s revival plan and a goal to leave TSMC behind in manufacturing process advancements, but the situation is not that dramatic.
To test Intel’s 18A (1.8nm-class) process technology, Broadcom produced wafers with test patterns typical of the products it designs. After the company received these shuttle wafers, its engineers and executives were allegedly unsatisfied with the production node, claiming it was ‘not yet viable to move to high-volume production,’ according to Reuters' sources. It could be a blow for Intel’s foundry unit, but Intel disclosed defect density for its 18A process last week, and it looks healthy enough for a node that will enter mass production two or three quarters down the road.

“I am happy to update the audience that that we are now, for this production process, we are now below 0.4 d0 defect density, this is now a healthy process,” said Pat Gelsinger, chief executive of Intel, at the Deutsche Bank’s 2024 Technology Conference.
Generally, it is considered that a defect density below 0.5 defects per square centimeter is a good result, so even keeping in mind that defect density varies by process and application, Intel 18A’s defect density of 0.4 defects per square centimeter is a reasonably good result considering its timing. Yet, TSMC’s N7 and N5 technologies had a defect density of 0.33 at a similar development stage, and when TSMC’s N5 reached mass production, its defect density dropped to 0.1. Yet, TSMC’s N3 started with a higher defect density but matched N5’s defect rate after five to six quarters.
Also, Broadcom has yet to finalize its assessment of Intel’s 18A manufacturing technology, signaling that its evaluation is ongoing, the company’s spokesperson told Reuters.
Broadcom is a major supplier of chips for telecommunication equipment as well as one of the world’s leading contract chip designers, which develops TPU AI processors for Google and is rumored to be working on AI processors for OpenAI, which makes Broadcom a particularly important customer for TSMC and a desired client for other foundries, including Intel. But it takes a lot to serve Broadcom properly.
Earlier this year, Broadcom demonstrated what was considered the world’s largest processor at the time. The XPU used two near the reticle limit (858mm^2, 26 mm by 33 mm) to compute chiplets with six HBM3 memory stacks each (i.e., 12 HBM3 stacks total). In context, Nvidia’s B200 GPU consists of two near-reticle limits compute chiplets and eight HBM3E stacks.
Creating a chiplet of this size is a significant achievement. Achieving a good yield with such a chiplet is another milestone, and Broadcom’s and Nvidia’s foundry partner TSMC has succeeded in this. It means that to serve Broadcom using its 18A process technology, Intel needs to be able to make chaplets of this scale with good yields, which is not easy. Whether or not the company will be able to meet Broadcom’s requirements for defects and yields of big chips with its 18A in 2025 remains to be seen, but for now, Broadcom does not seem to be satisfied.

I'm assuming that Broadcom is used to TSMC level of "Defect Density" and what Intel presented wouldn't pass muster @ TSMC for a similar node, especially the more mature ones that have a much lower rate of "Defect Density".

 

[JRStern]

This is too late for them to cancel 20A because they "don't need it". Like, at least 6 months too late. Delays in Arrow Lake could be very costly for them, especially if they miss at least part of the holiday shopping season.

A further argument against it "saving money" is that their margins will be reduced by going with TSMC. Again, this is too late in the game to kill it just for financial reasons (i.e. after they spent so much to get it to this point). There must be some other reason.

Finally, we don't know whether the version using TSMC will be better or not. Maybe that's what ultimately killed it. If the compute die on 20A underperformed the TSMC N3B die from Lunar Lake, it could've been the final nail in the coffin.

Well I hear you.

Unless we get the inside poop we're all guessing.

In my little head I find I can generally make up a story using only a single variable, yield, and get a story that covers known facts. May not be the whole story, but it's likely about the same dynamic as the whole story.

But your story makes sense, too.