News Intel Ups Aurora's Performance to 2 ExaFLOPS, Engages in ZettaFLOPS Race

[Admin]

Intel's Ponte Vecchio to power European exascale supercomputer.

Intel Ups Aurora's Performance to 2 ExaFLOPS, Engages in ZettaFLOPS Race : Read more

 

[JayNor]

"The system was first announced in 2015, was set to be powered by Intel's Xeon Phi accelerators and deliver around 180 PetaFLOPS in 2018."

I believe those Xeon Phi accelerators were something similar to the Gracemont cores on the Alder Lake. Maybe this design will again be evaluated again, as leaks say the efficient core counts on the Alder Lake successors will increase from 8 to 16 in 2022, and to 24 in 2023.

 

[JayNor]

Intel stated that Aurora node processing was memory bandwidth limited with just HBM attached to Ponte Vecchio. They added the SRAM Rambo Cache as a solution.

I've seen large improvements in HBM performance specs recently. I wonder if the Aurora node design is still at a point where they can evaluate those type of changes.

 

[Integr8d]

You have to remember; these are ‘Intel years’.

 

[dalek1234]

You have to remember; these are ‘Intel years’.

It reminds me of Uber minutes. I think there are 120 seconds in each minute, last time I counted (yesterday)