Intel's 45nm chips coming next year

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i'm guessing i have that clamath cause my p2 is 366mhz.

but soon my new rig with 3700 will come and i can hide this shit away somewhere, or figure out how to make it a firewall. 8)

266mhz came in 2 forms - clamath and deschutes, the deschutes will run at 2.0v (and the shell will say so) and the clamath will run at 2.8v (back in its day there was a 333mhz clamath that put out 40+w of heat and they thought that was hot LOL).

Old P2's and P3's are great for servers cause anything that resembles a heatsink and any movement of air would cool em (my P3 1000 server with an AMD AthlonXP cooler with a coolermaster silent fan with 7v mod runs at room temp and dead silent).

Im sort of a fan for Intels but only there P6 stuff cause i suppose they never let me down (my celeron 667 overclocked to 1000 no extra vcore, and my later tualatin 1.1a celeron/256k clocked to 1466 also with no extra vcore either, but my - P4 2.6c overclocked to 3.12ghz with 1.6v, and my P3 systems feel like they react quicker, makes me think the longer pipelines in the P4's are detectable? dunno) - if they do let me down with conroe im goin to AMD.

On the other hand AMD has always had a matching series for intel (not just a single sided intel fan's side).

Man i should change my name to P6 or something - can i actually do that?

Please excuse my fond P6 memories.
 
Deathwing and Corvette have the right idea they are both going towards the point that people are going to follow the trends of who has the better processor at the time, damn a few years ago i was buying all intel stuff now im at amd cus its better for my current needs. So everybody who has ANY type of fanboy bs can shut up cus it really doesnt matter that mutch, cant you still play your games and listen to your music all the same. All im really saying is that wouldnt you rather have a processor runs at todays standards or that of five years ago when they sucked ass, and in another five years these processors will suck ass and we will still be at the same argument of who has the better processor when all in all its more about workability and getting the job done fast and correctly.
 
arguing on the internet is like competing in the special olympics.

win or lose, ur still retarted

.....OLD

everyone knows but we dont give a rats ass

Old yes, but true also.
*looks at fanboy n00bs*
*shakes fist*
 
Isn't it just getting harder for AMD?!

Yes, in more than one way, it is.

The laws of physics are the same for everyone, everywhere.

Involved in this "dispute", is a trio (for what's relevant): Intel, AMD & IBM. It's just not true that each of these have achieved what they have, all by themselves. A lot of contributors are working in the shadows...
Most of the 'tricks' which make a microarchitecture shine are, more often than not, real technological brilliant jumps; and, of course, engineering is also about economy & profit.

Both Intel & IBM are giants; AMD is about 7 orders of magnitude smaller than Intel, let alone IBM. This factor, implies all the dimensions involved, from real estate to "skunk works".

I'm not going to quote every relevant post in this thread, but there are some points worth mentioning:

a. AMD, together with IBM et al, have an actual advantage, at the 90nm node. They managed to bring [comparatively] lower power consumption, lower frequencies, higher scalability & higher performance within a single pack: the (aka) K8 core. How? Apart the "skunk works", using IBM's SoI technology, a shorter & wider pipeline (à la RISC), an on-die memory controller and an open standard HyperTransport serial bus.
Will AMD be able to keep its current advantage towards Intel?

b. In the 19th century, James Clerck Maxwell, defined a rule of thumb, known as the 3D scaling rule, which states that, «any lossless circuit, when scaled down in its physical size by a factor of 10 in all 3 dimensions, will reflect a new circuit which is equal to the first, only 10 times faster.» There are no lossless circuits; so, was "NetBurst" a victim of MHz alone? Certainly not. Aside from Intel's marketing MHz hype, it was a fine technological approach to HPC; were it not for the old FSB, the lack of an on-die memory controller and the "mere" use of non-SoI strained silicon, "NetBurst" could be alive & well, even with fewer MHz... It hit the thermal barrier, however. Intel stubbornness? Short-sightedness?


c. IBM broke - again - the patent record number, last year.
Both POWER6 & Cell are to be working above 4GHz, within two years, max. Down with the MHz myth. Will IBM be able to "aid" the next AMD (aka) K8L core climbing up in 'speed'? Will AMD get by with HyperTransport v3.0 & Z-RAM? Will a programmable on-die memory controller be viable? What if the market trends change?

d. "Dry" scanning lithography will go down as far as the [commercial] 32nm node, probably. Double-exposure & Immersion lithography may go as far as the [commercial] 22nm node (these are ready, time-to-market aware technologies, not R&D); after, perhaps EUV & nano-robots (and what else?...). New materials, high-k metals, 3D gates, core-stacking, nanotech/molecular/quantum computing technologies are going to be pervasive, perhaps within the next 10 years. But, the laws of physics are the same for everyone, everywhere.

It doesn't make much sense to have a bunch of highly sophisticated features within a multi-core die, running at a snail's pace, does it?
MHz are here to stay & some of the highly sophisticated features are already implemented.

I believe that, if AMD holds to the MHz/TDP compromise with Intel, the next big fight will be feature's wise... And who gets there first. At this point, Intel has the lead.


Cheers!
 
IBM made the crappy cyrix chips, they sold there computer company, and the PS3 is late - makes you wonder what there actually doing.

Intel's 90nm process wasnt to blame - there Pentium M's did better, but there P4's didnt - design more likly hit a wall, besides - design was getting old anyhow.
 
They also make the much better PPC chips, some decent enterprise hardware and the new cell processor ( the jury is still out on that one ).

IBM actually has a pretty good research & development division.

It appears they are concentrating on consulting, R&D and high end hardware.
 
Now all x86 cpus are 3 issues wide. Conroe will be four. Intel will use trigate(3d?) transisters in the 45nm process. Alot of info is in the thread here. We needed a mod to keep the nOObs from craping on the tread, like thay do here. Nice to see the trash take'n out.
 
If you dare to care, IBM has THE best R&D of all.

They didn't sell their PC/Laptop to Lenovo just because; and, they didn't stop developing the PowerPC architecture: they're focusing in the embedded chip market and, simultaneously, improving their POWER line (POWER6 is coming [very] soon & POWER7 has already left the drawing board). They're IN in every computing platform you can imagine and, aside their patents record #, they also hold the biggest number of partnerships.
Outside x86 ISA, IBM just leaves everyone else in the dust. When POWER6 comes out (at about 4GHz), not even Sun will have a chance, unless in the blade server market, with its T1000 & T2000 line.

Within the [most profitable] x86 ISA, the story is (for the time being) different: AMD's taking more & more server market share with its Opteron line; And, if Intel doesn't take a firm step in the meantime, it'll be harder for both x86 Xeon & IA-64 Itanium to arrive in time to compete.

As for Cell, SONY, Toshiba & IBM may have strike gold, in every computing arenas, embedded & multimedia included. Cell is, in all respects, an order of magnitude ahead of every [known] ISA and I wouldn't be surprised if Cell began to threaten the well established & 'sacred' x86 ISA, within the next decade...

Sorry, linux_0. This reply was to be made to Apache_lives.


Cheers!
 
X86 has many problems. Intel had planed to rid of it and sell Itanium on desktops, but AMD has pushed it further and needed to or they could be shut out. Now Intel is behind and fighting back, but with more x86. Cell can't do everything as well x86. It is made to do specific tasks.
 
Isn't it just getting harder for AMD?!

And why??

It's a sweet joke for me to know that Intel's 65nm aren't cool enough than AMD's tried-and-true 90nm. :lol:

Did you see the new AM2 processors (specifically the 35W X2 3800+) which will consume no more than 65W (excluding the FX-62)?
Let's not forget that these are still 90nm 8) [/code]

that's stupid of you, it's the other way around... Intel's 65nm with the old architecture matches AMD's current 90nm consumption... when Intel's 65nm with new architecture comes in... it's gonna be cooler than AMD's 90nm.
 
Now all x86 cpus are 3 issues wide. Conroe will be four. Intel will use trigate (3d?) transisters in the 45nm process.

Right. Intel's Dempsey/Conroe/Merom microarchitecture will [probably] use 3D trigates (and, in a later implementation, high-k metal interconnects in a smaller node). However, a four-issue TLP architecture may actually backfire, due to two mains reasons: It'll increase latency issues, since branch prediction has to be very fine-tuned in order to 'predict' thread-level input; And, most software isn't even compiled for a 2-issue pipeline, let alone a 4-issue. Although TLP is the "trademark" in server performance (Sun's UltraSPARC T1 is an 8-core chip with 4 threads per core), x87 applications hardly reach the 2-thread level parallelism mark; anyway, it's hard to believe Intel wasting so much hardwired resources if it didn't already have a strategic plan, both for the [x86] server market (4-issue Xeon) and the foreseeable workstation/desktop/laptop multithreaded future, since all CPUs (Dempsey/Conroe/Merom) are based upon the same microarchitecture.

Cell can't do everything as well x86. It is made to do specific tasks.

Well, not quite.
Cell is - for the moment! - out of the x86 space. But, it has a general purpose unit (PPC 970FX, a bit 'depleted') and 8 Synergistic Processing Elements (SPEs), in its initial design. The wonder of this preciosity is its scalability: aside its potentially astounding performance (we'll see when it's out), it encompasses a general purpose unit (not for specific tasks at all) which can work in a discrete manner with the SPEs and/or as a single 'processor', taking advantage of the most parallelism it can supply, at >4GHz! (On the other hand, its nightmare is the compiler, the "Octopiler".).


If you care to have a peek:

http://arstechnica.com/news.ars/post/20060225-6265.html, for instance.


Cheers!
 
Thanks for the info. Thread and issue are not the same. Your post seems to confuse the two--I may have misunderstood. Conroe will execute 2 threads, and eight issues total. If all issues will execute all types of instructions is unclear. New compilers must be coming too, for SSE4.
 
correct, Conroe is dual core, each core is single threaded, but 4-wide.

Issue refers to how many instructions can be dispatched from the front-end to the execution pipeline (or retired from the scheduler) simultaneously, in the best case. Conroe can issue/retire 4 at a time, but no, all instructions can not dispatch on all ports (to all execution engines) as there are specialized engines for different instruction types.
 
Both you and morttt are correct, on what regards issues vs threads. Sorry for the flaw.

Ah! Still, it is true that Dempsey/Conroe/Merom will only be able to extract & execute <2 instructions-per-cycle at best, in the overwhelming majority of cases and close to 3, in very exceptional circumstances (the kind of application & the level of parallelization achieved by the programmers, at compile time.) Furthermore, there's little point in adding 'SSE4' extensions, if applications are not (re)compiled in order to take [full] advantage of it.


Cheers!